a AD9831 FEATURES GENERAL DESCRIPTION 3 V/5 V Power Supply This DDS device is a numerically controlled oscillator employ- 25 MHz Speed ing a phase accumulator, a sine look-up table and a 10-bit D/A On-Chip SINE Look-Up Table converter integrated on a single CMOS chip. Modulation On-Chip 10-Bit DAC capabilities are provided for phase modulation and frequency Parallel Loading modulation. Powerdown Option Clock rates up to 25 MHz are supported. Frequency accuracy 72 dB SFDR can be controlled to one part in 4 billion. Modulation is effected 125 mW (5 V) Power Consumption by loading registers through the parallel microprocessor 40 mW (3 V) Power Consumption interface. 48-Pin A powerdown pin allows external control of a powerdown APPLICATIONS mode. The part is available in a 48-pin package. DDS Tuning Digital Demodulation FUNCTIONAL BLOCK DIAGRAM DVDD DGND AVDD REFOUT AGND FS ADJUST REFIN MCLK ON-BOARD FULL-SCALE COMP REFERENCE CONTROL FSELECT FREQ0 REG 12 PHASE SIN MUX ACCUMULATOR 10-BIT DAC IOUT ROM (32-BIT) FREQ1 REG PHASE0 REG AD9831 PHASE1 REG MUX PHASE2 REG PHASE3 REG SLEEP PARALLEL REGISTER TRANSFER CONTROL RESET MPU INTERFACE D0 D15 WR A0 A1 A2 PSEL1 PSEL0 REV. B Information furnished by Analog Devices is believed to be accurate and Analog Devices, Inc., reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: Fax: (V = +3.3 V 6 10% +5 V 6 10% AGND = DGND = 0 V T = T to T REFIN = 1 DD A MIN MAX AD9831SPECIFICATIONS REFOUT R = 3.9 kV R = 300 V for IOUT unless otherwise noted) SET LOAD Parameter AD9831A Units Test Conditions/Comments SIGNAL DAC SPECIFICATIONS Resolution 10 Bits Update Rate (f ) 25 MSPS nom MAX I Full Scale 4 mA nom OUT 5 mA max Output Compliance 1.5 V max DC Accuracy Integral Nonlinearity 1 LSB typ Differential Nonlinearity 0.5 LSB typ 2 DDS SPECIFICATIONS Dynamic Specifications Signal to Noise Ratio 50 dB min f = 25 MHz, f = 1 MHz MCLK OUT Total Harmonic Distortion 53 dBc max f = 25 MHz, f = 1 MHz MCLK OUT 3 Spurious Free Dynamic Range (SFDR) f = 6.25 MHz, f = 2.11 MHz MCLK OUT Narrow Band (50 kHz) 72 dBc min 5 V Power Supply 70 dBc min 3 V Power Supply Wide Band (2 MHz) 50 dBc min Clock Feedthrough 60 dBc typ 4 Wake-Up Time 1 ms typ Powerdown Option Yes VOLTAGE REFERENCE Internal Reference +25C 1.21 Volts typ T to T 1.21 7% Volts min/max MIN MAX REFIN Input Impedance 10 M typ Reference TC 100 ppm/C typ REFOUT Output Impedance 300 typ LOGIC INPUTS V , Input High Voltage V 0.9 V min INH DD V , Input Low Voltage 0.9 V max INL I , Input Current 10 A max INH C , Input Capacitance 10 pF max IN POWER SUPPLIES AVDD 2.97/5.5 V min/V max DVDD 2.97/5.5 V min/V max I 12 mA max 5 V Power Supply AA I 2.5 + 0.33/MHz mA typ 5 V Power Supply DD 5 I + I 15 mA max 3 V Power Supply AA DD 24 mA max 5 V Power Supply 6 Low Power Sleep Mode 1 mA max 1 M Resistor Tied Between REFOUT and AGND NOTES 1 Operating temperature range is as follows: A Version: 40C to +85C. 2 100% production tested. 3 f = 6.25 MHz, Frequency Word = 5671C71C HEX, f = 2.11 MHz. MCLK OUT 4 See Figure 11. To reduce the wake-up time at low power supplies and low temperature, the use of an external reference is suggested. 5 Measured with the digital inputs static and equal to 0 V or DVDD. 6 The Low Power Sleep Mode current is typically 2 mA when a 1 M resistor is not tied between REFOUT and AGND. The AD9831 is tested with a capacitive load of 50 pF. The part can be operated with higher capacitive loads, but the magnitude of the analog output will be attenu- ated. For example, a 5 MHz output signal will be attenuated by 3 dB when the load capacitance equals 85 pF. Specifications subject to change without notice. R SET 3.9k 10nF FS REFOUT REFIN AVDD ADJUST 10nF COMP ON-BOARD FULL-SCALE REFERENCE CONTROL 12 IOUT SIN 10-BIT DAC ROM 300 50pF AD9831 Figure 1. Test Circuit with Which Specifications Are Tested 2 REV. B