KSZ8873MLL

KSZ8873MLL/FLL/RLL Integrated 3-Port 10/100 Managed Switch with PHYs Standard Features - Non-Blocking Switch Fabric Ensures Fast Advanced Switch Features Packet Delivery by Utilizing a 1k MAC Address - IEEE 802.1q VLAN Support for Up to 16 Groups Lookup Table and a Store-and-Forward Archi- (Full Range of VLAN IDs) tecture - VLAN ID Tag/Untag Options, Per Port Basis - Full-Duplex IEEE 802.3x Flow Control (PAUSE) - IEEE 802.1p/q Tag Insertion or Removal on a with Force Mode Option Per Port Basis (Egress) - Half-Duplex Back Pressure Flow Control - Programmable Rate Limiting at the Ingress and - HP Auto MDI-X for Reliable Detection of and Egress on a Per Port Basis Correction for Straight-Through and Crossover - Broadcast Storm Protection with Percent Con- Cables with Disable and Enable Option trol (Global and Per Port Basis) -LinkMD TDR-Based Cable Diagnostics Permit - IEEE 802.1d Rapid Spanning Tree Protocol Identification of Faulty Copper Cabling on Port 2 Support - Comprehensive LED Indicator Support for Link, - Tail Tag Mode (1 byte Added before FCS) Sup- Activity, Full-/Half-Duplex and 10/100 Speed port at Port 3 to Inform the Processor which - HBM ESD Rating 3 kV Ingress Port Receives the Packet and its Prior- Switch Monitoring Features ity - Port Mirroring/Monitoring/Sniffing: Ingress and/ - Bypass Feature that Automatically Sustains the or Egress Traffic to Any Port or MII Switch Function between Port 1 and Port 2 - MIB Counters for Fully Compliant Statistics when CPU (Port 3 Interface) Goes into Sleep Gathering 34 MIB Counters Per Port Mode - Loopback Modes for Remote Diagnostic of Fail- - Self-Address Filtering ure - Individual MAC Address for Port 1 and Port 2 Low Power Dissipation - Supports RMII Interface and 50 MHz Reference - Full-Chip Software Power-Down (Register Con- Clock Output figuration Not Saved) - MAC MII Interface Supports Both MAC and - Full-Chip Hardware Power-Down (Register PHY Modes Configuration Not Saved) - IGMP Snooping (IPv4) Support for Multicast - Energy-Detect Mode Support Packet Filtering - Dynamic Clock Tree Shutdown Feature - IPv4/IPv6 QoS Support - Per Port Based Software Power-Save on PHY - MAC Filtering Function to Forward Unknown (Idle Link Detection, Register Configuration Pre- Unicast Packets to Specified Port served) Comprehensive Configuration Register Access - Voltages: Single 3.3V Supply with Internal 1.8V - Serial Management Interface (SMI) to All Inter- LDO for 3.3V VDDIO nal Registers - Optional 3.3V, 2.5V, and 1.8V for VDDIO - MII Management (MIIM) Interface to PHY Reg- - Transceiver Power 3.3V for VDDA 3.3 isters 2 Industrial Temperature Range: 40C to +85C - High Speed SPI and I C Interface to All Internal Available in a 64-Pin LQFP, Lead-Free Package Registers - I/O Pins Strapping and EEPROM to Program Applications Selective Registers in Unmanaged Switch Mode VoIP Phone Set-Top/Game Box - Control Registers Configurable on the Fly (Port- Priority, 802.1p/d/q, AN) Automotive Ethernet QoS/CoS Packet Prioritization Support Industrial Control Per Port, 802.1p and DiffServ-Based IPTV POF - Re-Mapping of 802.1p Priority Field Per Port SOHO Residential Gateway basis, Four Priority Levels Broadband Gateway/Firewall/VPN Proven Integrated 3-Port 10/100 Ethernet Switch Integrated DSL/Cable Modem - 3rd Generation Switch with Three MACs and Wireless LAN Access Point + Gateway Two PHYs Fully Compliant with IEEE 802.3u Standalone 10/100 Switch 2017 Microchip Technology Inc. DS00002348A-page 1KSZ8873MLL/FLL/RLL TO OUR VALUED CUSTOMERS It is our intention to provide our valued customers with the best documentation possible to ensure successful use of your Microchip products. To this end, we will continue to improve our publications to better suit your needs. Our publications will be refined and enhanced as new volumes and updates are introduced. If you have any questions or comments regarding this publication, please contact the Marketing Communications Department via E-mail at docerrors microchip.com. We welcome your feedback. Most Current Data Sheet To obtain the most up-to-date version of this data sheet, please register at our Worldwide Web site at: