DTM64360C 2GB - 240-Pin 1Rx8 Registered ECC DDR3 DIMM Identification DTM64360C 256Mx72 2GB 1Rx8 PC3-10600R-9-11-A0 Performance range Clock / Module Speed / CL-t -t RCD RP 667 MHz / PC3-10600 / 9-9-9 533 MHz / PC3-8500 / 8-8-8 533 MHz / PC3-8500 / 7-7-7 400 MHz / PC3-6400 / 6-6-6 Features Description 240-pin JEDEC-compliant DIMM, 133.35 mm wide by 30 mm DTM64360C is a registered 256Mx72 memory module, high which conforms to JEDEC s DDR3, PC3-10600 standard. The assembly is a Single-Rank. The Rank is Operating Voltage: 1.5V 0.075 comprised of nine 256Mx8 DDR3-1333 Hynix SDRAMs. I/O Type: SSTL 15 One 2K-bit EEPROM is used for Serial Presence On-board I2C temperature sensor with integrated serial Detect and a combination register/PLL, with Address presence-detect (SPD) EEPROM. and Command Parity, is also used. Data Transfer Rate: 10.6 Gigabytes/sec Both output driver strength and input termination impedance are programmable to maintain signal Data Bursts: 8 and burst chop 4 mode integrity on the I/O signals in a Fly-by topology. ZQ Calibration for Output Driver and On-Die Termination (ODT) A thermal sensor accurately monitors the DIMM module and can prevent exceeding the maximum operating Programmable ODT / Dynamic ODT during Writes temperature of 95C. Programmable CAS Latency: 6, 7, 8, and 9 Bi-Directional Differential Data Strobe signals SDRAM Addressing (Row/Col/Bank): 15/10/3 Fully RoHS Compliant Pin Configuration Pin Description Front Side Back Side Name Function 1 V 31 DQ25 61 A2 91 DQ41 121 V 151V 181A1 211V CB 7:0 Data Check Bits REFDQ SS SS SS 2 V 32 V 62 V 92 V 122 DQ4 152DM3 182V 212DM5 DQ 63:0 Data Bits SS SS DD SS DD 3 DQ0 33 /DQS3 63 CK1** 93 /DQS5123 DQ5 153/TDQS12 183V 213 /TDQS14 DQS 8:0 , /DQS 8:0 Differential Data Strobes DD 4 DQ1 34 DQS3 64 /CK1** 94 DQS5 124 V 154V 184CK0 214V DM 8:0 Data Mask SS SS SS 5 V 35 V 65 V 95 V 125 DM0 155DQ30 185/CK0 215DQ46 /TDQS 17:9 Termination strobes SS SS DD SS 6 /DQS0 36 DQ26 66 V 96 DQ42 126 /TDQS9 156DQ31 186V 216 DQ47 CK 1:0 , /CK 1:0 Differential Clock Inputs DD DD 7 DQS0 37 DQ27 67 V 97 DQ43 127 V 157V 187/EVENT 217V CKE 1:0 Clock Enables REFCA SS SS SS 8 V 38 V 68 P I 98 V 128 DQ6 158 CB4 188 A0 218 DQ52 /CAS Column Address Strobe SS SS AR N SS 9 DQ2 39 CB0 69 VDD 99 DQ48 129 DQ7 159CB5 189V 219 DQ53 /RAS Row Address Strobe DD 10 DQ3 40 CB1 70 A10/AP 100 DQ49 130 V 160V 190BA1 220V /S 3:0 Chip Selects SS SS SS 11 V 41 V 71 BA0 101 V 131 DQ12 161DM8 191V 221DM6 /WE Write Enable SS SS SS DD 12 DQ8 42 /DQS8 72 V 102 /DQS6132 DQ13 162/TDQS17 192/RAS 222/TDQS15A 15:0 Address Inputs DD 13 DQ9 43 DQS8 73 /WE 103 DQS6 133 V 163V 193/S0 223V BA 2:0 Bank Addresses SS SS SS 14 V 44 V 74 /CAS 104 V 134 DM1 164CB6 194V 224 DQ54 ODT 1:0 On Die Termination Inputs SS SS SS DD 15 /DQS1 45 CB2 75 V 105 DQ50 135 /TDQS10 165CB7 195ODT0 225DQ55 SA 2:0 SPD Address DD 16 DQS1 46 CB3 76 /S1** 106 DQ51 136 V 166V 196A13 226V SCL SPD Clock Input SS SS SS 17 V 47 V 77 107 V 137 DQ14 167NC (TEST)197V 227 DQ60 SDA SPD Data Input/Output SS SS ODT1** SS DD 18 DQ10 48 V 78 V 108 DQ56 138 DQ15 168 /RESET 198 /S3, NC** 228 DQ61 /EVENT Temperature Sensing TT DD 19 DQ11 49 V 79 /S2, NC** 109 DQ57 139 V 169 199 V 229V /RESET Reset for register and DRAMs TT SS CKE1** SS SS 20 V 50 CKE0 80 V 110 V 140 DQ20 170V 200 DQ36 230 DM7 PAR IN Parity bit for Addr/Ctrl SS SS SS DD 21 DQ16 51 V 81 DQ32 111 /DQS7 141 DQ21 171 A15 201 DQ37 231 /TDQS16 /ERR OUT Error bit for Parity Error DD 22 DQ17 52 BA2 82 DQ33 112 DQS7 142 V 172A14 202V 232V A12/BC Combination input: Addr12/Burst Chop SS SS SS 23 V 53 /E O 83 V 113 V 143 DM2 173V 203 DM4 233 DQ62 A10/AP Combination input: Addr10/Auto-precharge SS RR UT SS SS DD 24 /DQS2 54 V 84 /DQS4 114 DQ58 144 /TDQS11 174 A12/BC 204 /TDQS13 234 DQ63 V Ground DD SS 25 DQS2 55 A11 85 DQS4 115 DQ59 145 V 175A9 205V 235V V Power SS SS SS DD 26 V 56 A7 86 V 116 V 146 DQ22 176V 206DQ38 236V V SPD EEPROM Power SS SS SS DD DDSPD DDSPD 27 DQ18 57 V 87 DQ34 117 SA0 147 DQ23 177 A8 207 DQ39 237 SA1 V Reference Voltage for DQs DD REFDQ 28 DQ19 58 A5 88 DQ35 118 SCL 148 V 178A6 208V 238SDA V Reference Voltage for CA SS SS REFCA 29 V 59 A4 89 V 119 SA2 149 DQ28 179V 209DQ44 239V V Termination Voltage SS SS DD SS TT 30 DQ24 60 V 90 DQ40 120 V 150 DQ29 180A3 210DQ45 240V NC No Connection DD TT TT ** Not used Document 06145, Revision A, 7-Dec-12 Dataram Corporation 2012 Page 1 DTM64360C 2GB - 240-Pin 1Rx8 Registered ECC DDR3 DIMM Front view 133.35 5.250 9.50 0.374 30.00 1.181 17.30 0.681 5.00 2.50 0.197 0.098 5.175 47.00 71.00 0.204 1.850 2.795 123.00 4.843 Back view Side view 3.94 Max 0.155 Max 4.00 Min 0.157 Min 1.27 .10 0.0500 0.0040 Notes Tolerances on all dimensions except where otherwise indicated are .13 (.005). All dimensions are expressed: millimeters inches Document 06145, Revision A, 7-Dec-12 Dataram Corporation 2012 Page 2