SigmaDSP 28-/56-Bit Audio Processor with Two ADCs and Four DACs Data Sheet ADAU1401 FEATURES GENERAL DESCRIPTION 28-/56-bit, 50 MIPS digital audio processor The ADAU1401 is a complete single-chip audio system with a 2 ADCs: SNR of 100 dB, THD + N of 83 dB 28-/56-bit audio DSP, ADCs, DACs, and microcontroller-like 4 DACs: SNR of 104 dB, THD + N of 90 dB control interfaces. Signal processing includes equalization, cross Complete standalone operation over, bass enhancement, multiband dynamics processing, delay Self-boot from serial EEPROM compensation, speaker compensation, and stereo image widening. Auxiliary ADC with 4-input mux for analog control This processing can be used to compensate for real-world limita- GPIOs for digital controls and outputs tions of speakers, amplifiers, and listening environments, Fully programmable with SigmaStudio graphical tool providing dramatic improvements in perceived audio quality. 28-bit 28-bit multiplier with 56-bit accumulator for full Its signal processing is comparable to that found in high end double-precision processing studio equipment. Most processing is done in full 56-bit, double Clock oscillator for generating master clock from crystal precision mode, resulting in very good low level signal perfor- PLL for generating master clock from 64 f , 256 f , S S mance. The ADAU1401 is a fully programmable DSP. The easy 384 f , or 512 f clocks S S to use SigmaStudio software allows the user to graphically 2 Flexible serial data input/output ports with I S-compatible, configure a custom signal processing flow using blocks such as left-justified, right-justified, and TDM modes biquad filters, dynamics processors, level controls, and GPIO Sampling rates of up to 192 kHz supported interface controls. On-chip voltage regulator for compatibility with 3.3 V systems ADAU1401 programs can be loaded on power-up either from a 48-lead, plastic LQFP serial EEPROM through its own self-boot mechanism or from an external microcontroller. On power-down, the current state APPLICATIONS of the parameters can be written back to the EEPROM from the Multimedia speaker systems ADAU1401 to be recalled the next time the program is run. MP3 player speaker docks Two - ADCs and four - DACs provide a 98.5 dB analog Automotive head units input to analog output dynamic. Each ADC has a THD + N of Minicomponent stereos 83 dB, and each DAC has a THD + N of 90 dB. Digital input Digital televisions and output ports allow a glueless connection to additional Studio monitors ADCs and DACs. The ADAU1401 communicates through an Speaker crossovers 2 I C bus or a 4-wire SPI port. Musical instrument effects processors In-seat sound systems (aircraft/motor coaches) Rev. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 20072012 Analog Devices, Inc. All rights reserved. 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ADAU1401 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 RAMs and Registers ....................................................................... 31 Applications ....................................................................................... 1 Address Maps .............................................................................. 31 General Description ......................................................................... 1 Parameter RAM .......................................................................... 31 Revision History ............................................................................... 3 Data RAM ................................................................................... 31 Functional Block Diagram .............................................................. 4 Read/Write Data Formats ......................................................... 31 Specif icat ions ..................................................................................... 5 Control Register Map ..................................................................... 33 Analog Performance .................................................................... 5 Control Register Details ................................................................ 35 Digital Input/Output .................................................................... 7 2048 to 2055 (0x0800 to 0x0807)Interface Registers ......... 35 Power .............................................................................................. 7 2056 (0x808)GPIO Pin Setting Register .............................. 36 Temperature Range ...................................................................... 7 2057 to 2060 (0x809 to 0x80C)Auxiliary ADC Data Registers ....................................................................................... 37 PLL and Oscillator ........................................................................ 7 2064 to 2068 (0x0810 to 0x814)Safeload Data Registers .. 38 Regu lator ........................................................................................ 8 2069 to 2073 (0x0815 to 0x819)Safeload Address Digital Timing Specifications ..................................................... 8 Registers ....................................................................................... 38 Absolute Maximum Ratings .......................................................... 11 2074 to 2075 (0x081A to 0x081B)Data Capture Registers 39 Thermal Resistance .................................................................... 11 2076 (0x081C)DSP Core Control Register ......................... 40 ESD Caution ................................................................................ 11 2078 (0x081E)Serial Output Control Register ................... 41 Pin Configuration and Function Descriptions ........................... 12 2079 (0x081F)Serial Input Control Register ....................... 42 Typical Performance Characteristics ........................................... 15 2080 to 2081 (0x0820 to 0x0821)Multipurpose Pin System Block Diagram ................................................................... 16 Configuration Registers ............................................................. 43 Theory of Operation ...................................................................... 17 2082 (0x0822)Auxiliary ADC and Power Control ............ 44 Initialization .................................................................................... 18 2084 (0x0824)Auxiliary ADC Enable .................................. 44 Power-Up Sequence ................................................................... 18 2086 (0x0826)Oscillator Power-Down ................................ 44 Control Registers Setup ............................................................. 18 2087 (0x0827)DAC Setup ...................................................... 44 Recommended Program/Parameter Loading Procedure ..... 18 Multipurpose Pins .......................................................................... 45 Power Reduction Modes ............................................................ 18 Auxiliary ADC ............................................................................ 45 Using the Oscillator .................................................................... 19 General-Purpose Input/Output Pins ....................................... 45 Setting Master Clock/PLL Mode .............................................. 19 Serial Data Input/Output Ports ................................................ 45 Voltage Regulator ....................................................................... 20 Layout Recommendations ............................................................. 48 Audio ADCs .................................................................................... 21 Parts Placement .......................................................................... 48 Audio DACs .................................................................................... 22 Grounding ................................................................................... 48 Control Ports ................................................................................... 23 Typical Application Schematics .................................................... 49 2 I C Port ........................................................................................ 24 Self-Boot Mode ........................................................................... 49 SPI Port ........................................................................................ 27 2 I C Control .................................................................................. 50 Self-Boot ...................................................................................... 28 SPI Control .................................................................................. 51 Signal Processing ............................................................................ 30 Outline Dimensions ....................................................................... 52 Numeric Formats ........................................................................ 30 Ordering Guide .......................................................................... 52 Programming .............................................................................. 30 Rev. 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