USB Client
Controller
PCIe RC/EP
USB 3380, PCI Express to USB 3.0 Peripheral Controller
The USB 3380 is a PCI Express Gen 2 to USB 3.0 SuperSpeed Peripheral
Features
Controller. It features one PCI Express Gen 2 x1 port and one USB 3.0-
USB 3.0 Client Interface
compliant client port.
o Compliant to the USB 3.0
Specification
o 1 upstream port High Performance and Flexibility
o Supports SuperSpeed, Hi-Speed,
The USB 3380 provides a matching bandwidth at 5 GTps
Full-Speed modes
between the PCI Express Gen 2 bus and the USB 3.0 SuperSpeed bus. The
o Four Descriptor-based DMA
controller can easily add a USB 3.0 client port to an existing PCI Express system,
channels for automatic data
as well as convert an existing PCI Express function (endpoint) to a USB 3.0
transfers
product. The USB 3380 can configure the PCI Express port as one x1 upstream
o Supports USB Duet
port or one x1 downstream port. The flexibility allows different system
Technology
configurations to achieve the maximum performance of the product.
o USB Auto-Enumeration
Technology
Abundant Software
o Support for Bulk, Isochronous,
and Interrupt Endpoints
As the successor of the gold standard NET 2280, PCI to USB 2.0 Peripheral
o USB Power Management
Controller, the USB 3380 can be used with existing NET 2280 software with no
USB 3.0 link power
or minimal change. Driver stacks are already available in common OSs such as
management states: U0, U1,
Windows (XP, Vista, 7 and CE), Linux, and VxWorks. The USB Duet software
U2, U3
will provide the fastest PC interconnect at 400 mega bytes per second of transfer
USB 2.0 link power
speed with just a simple USB cable.
management states: L0, L1, L2
PCI Express Interface
o PCI Express Gen 2 (5Gbps)
SPI
o Electrical Compliance to PCI
PCIe PHY
8051 EEPROM
Express Base Specification r2.0
Ctl
o PCIe interface and integrated
root complex provides two
configurations: To USB Hi/FULL
USB 2.0 PHY
PCIe US/DS Port
SPEED HOST
one x1 upstream port
USB IN FIFOs
one x1 downstream port
Memory
text
Controller
o Reference Clock Buffered
USB OUT FIFOs
Output signals for downstream
To USB SUPER
USB 3.0 PHY
SPEED HOST
ports (RC mode)
o Low latency
o PCI Express Power Management
All link power management
DMA PLL
states: L0, L0s, L1, L2/L3
Ready, and L3
Device states: D0 and D3(hot
Figure 1: USB 3380 Block Diagram
& cold)
Vaux, Wake#, Beacon support
o 256 byte maximum payload size
Applications
o ExpressCard 2.0 compliance
Target applications for the USB 3380 as a PCI Express endpoint include PCs,
servers, docking stations, printers, and PCI Express embedded systems. The
General
main applications for the USB 3380 as a PCI Express root complex include
o Four GPIO pins for maximum
WLAN dongles, graphics/video dongles, and HDTV tuners/codec.
design flexibility
o 10mm x 10mm 88-pin QFN
package with 0.4 mm pitch
Add a USB 3.0 Client Port to PCI Express-Based Systems
o Low power 90nm technology
The USB 3380 can be used to easily add a USB 3.0 client port to any PCI
o Industrial Temp support
Express based embedded system. As a PCI Express endpoint, the USB 3380s
o Lead-free package
standard PCI Express interface connects directly to any PCI Express bus.
PLX Technology, www.plxtech.com Page 1 of 2 6/22/2012, Version 1.4
x1USB 3380, PCI Express to USB 3.0 Peripheral Controller
Standard PCI Express registers allow the existing Root typical PCI Express Root Complex environment. The
Complex to configure and send data to and from the USB USB 3380 supports one pair of buffered, 100 MHz HCSL
3380. output clocks, for its downstream port when configured in
Root Complex mode. The clock output pair can be
disabled by software or serial EEPROM when not in use,
for additional power savings. This feature greatly reduces
system BOM cost by eliminating the need for an extra
clock buffer on the PCB.
Shared memory in the USB 3380 functions as main
memory for holding descriptors or other control data. The
integrated 8051 CPU can also be used to configure the
device to resemble a standard USB class device (like a
communications or video device) even if there is no local
intelligence on the peripheral.
Development Tools
Figure 2: Adding a USB 3.0 client port to a PCI
PLX offers hardware and software tools to enable rapid
Express-based Printer with USB 3380
customer design activity. These tools consist of a hardware
module (USB3380EVK), hardware documentation
Migrate a PCI Express Endpoint to a USB 3.0
(available at www.plxtech.com), and a Software
Product
Development Kit.
The USB 3380 is designed to easily convert an existing
PCI Express endpoint/adapter card to a standalone USB
The USB3380EVK is a x1 PCI Express adapter board that
3.0 product.
easily plugs into any standard PCI Express slot. The
USB3380EVK-RC includes an optional PCI Express slot
Instead of a CPU configuring the PCI Express endpoint,
for plugging in another PCI Express endpoint.
the USB 3380 can itself act as the PCI Express Root
Complex, with configuration information coming from its
Both USB host and peripheral-side software is included
internal 8051 CPU or from the USB host. Auto-
with the USB3380EVK. The host-side software consists
Enumeration Technology allows a standard USB host to
of USB drivers and test applications. The peripheral-side
detect this new USB device even if no firmware has been
firmware is used to configure the USB 3380 to resemble a
run. This means that firmware can actually be downloaded
standard USB class device (like a printer or mass storage
to the USB device after initial boot-up.
device) for which no USB host drivers will need to be
written. For custom applications, firmware APIs are
provided to abstract the USB transactions to reads and
writes. While this software is available for various
operating systems, it is written in standard C with
portability in mind.
Product Ordering Information
Part Number Description
USB3380-AB50NI G One x1-port PCI Express Gen 2.0 to
USB 3.0 SuperSpeed Peripheral
2
Controller (10x10mm )
Figure 3: Creating a USB 3.0 WiFi dongle with a PCI
Visit www.plxtech.com for more information.
Express based Wireless LAN adapter and the USB
3380
The USB 3380 includes PCI Express clock and other
standard signals to compensate for those usually found in a
PLX Technology, www.plxtech.com Page 2 of 2 6/22/2012, Version 1.4