MCP48CXBXX 8/10/12-Bit Digital-to-Analog Converters, 1 LSb INL Single/Dual Voltage Outputs with SPI Interface Features Package Types Memory Options: MCP48CXBX1 (Single) - Volatile Memory: MCP48CVBXX MSOP-10, DFN-10 (3 x 3) - Nonvolatile Memory: MCP48CMBXX V DD 1 10 SDI Operating Voltage Range: CS - 2.7V to 5.5V Full specifications 2 9 SCK V - 1.8V to 2.7V Reduced device specifications REF SDO 3 8 Output Voltage Resolutions: V OUT 4 7 V SS - 8-Bit: MCP48CXB0X (256 steps) NC 5 6 LAT/HVC - 10-Bit: MCP48CXB1X (1024 steps) - 12-Bit: MCP48CXB2X (4096 steps) QFN-16 (3 x 3) Nonvolatile Memory (MTP) Size: 32 Locations 1 LSb Integral Nonlinearity (INL) Specification DAC Voltage Reference Source Options: CS 1 12 SCK - Device V DD V 2 11 SDO REF -External V pin (buffered or unbuffered) (1) REF 17 EP V 3 10 OUT V SS - Internal band gap (1.214V typical) NC 4 9 LAT/HVC Output Gain Options: -1x (Unity) - 2x (available when not using internal V as DD voltage source) MCP48CXBX2 (Dual) Power-on/Brown-out Reset (POR/BOR) MSOP-10, DFN-10 (3 x 3) Protection Power-Down Modes: V DD 1 10 SDI - Disconnects output buffer (High-Impedance) CS 2 9 SCK - Selection of V pull-down resistors OUT V REF SDO 3 8 (100 k or 1 k) V OUT0 4 7 V SPI Interface: SS (2) - Supports 00 and 11 modes V 5 6 LAT/HVC OUT1 - 50 MHz write speed QFN-16 (3 x 3) - 25 MHz read speed Package Types: - Dual: 16-lead 3 x 3 QFN, 10-lead MSOP, 10-lead 3 x 3 DFN CS 1 12 SCK - Single: 16-lead 3 x 3 QFN, 10-lead MSOP, V 2 11 SDO REF0 10-lead 3 x 3 DFN (1) 17 EP V 3 10 OUT0 V SS Extended Temperature Range: -40C to +125C V 4 9 REF1 LAT0/HVC Note 1: Exposed pad (substrate paddle). 2: This pins signal can be connected to DAC0 and/or DAC1. 2019 Microchip Technology Inc. DS20006160A-page 1 V V V 5 16 NC 5 16 DD DD OUT1 NC 6 15 NC NC 6 15 NC NC 7 14 NC NC 7 14 NC LAT1 8 13 SDI NC 8 13 SDIMCP48CXBXX When the V pin is used with an external voltage General Description REF reference, the user can select between a gain of 1 or 2 The MCP48CXBXX are single and dual-channel 8-bit, and can have the reference buffer enabled or disabled. 10-bit, and 12-bit buffered voltage output When the gain is 2, the V pin voltage should be REF Digital-to-Analog Converters (DAC), with volatile or limited to a maximum of V /2. DD MTP memory and an SPI serial interface. These devices have a four-wire SPI-compatible serial The MTP memory can be written by the user up to 32 interface with speeds up to 50MHz for write and times, for each specific register. It requires a 25 MHz for read operations. high-voltage level on the HVC pin, typically 7.5V, in order to successfully program the desired memory Applications location. The nonvolatile memory includes power-up output values, device configuration registers and Set Point or Offset Trimming general purpose memory. Sensor Calibration pin, the device V or the internal band gap The V Low-Power Portable Instrumentation REF DD voltage can be selected as the DACs reference PC Peripherals voltage. When V is selected, V is internally DD DD Data Acquisition Systems connected to the DAC reference circuit. MCP48CVBX1 Block Diagram (Single-Channel Output) V DD Memory Power-up/Brown-out Control V SS VOLATILE (4 x 16) DAC0 SCK SPI Serial Interface Module VREF and Control Logic SDI POWER-DOWN (WiperLock Technology) GAIN SDO STATUS CS NONVOLATILE (13 x 16) DAC0 V IHH LAT/HVC VREF POWER-DOWN LAT0 GAIN WIPERLOCK V DD PD1:PD0 and VREF1:VREF0 V Band gap BG GAIN 1.214V VREF1:VREF0 OPAMP V OUT0 V REF0 V DD PD1:PD0 VREF1:VREF0 Note 1: Available only on specific packages. DS20006160A-page 2 2019 Microchip Technology Inc. Resistor Ladder 1k 100 k