74HC4053 74HCT4053 Triple 2-channel analog multiplexer/demultiplexer Rev. 9 10 February 2016 Product data sheet 1. General description The 74HC4053 74HCT4053 is a triple single-pole double-throw analog switch (3x SPDT) suitable for use in analog or digital 2:1 multiplexer/demultiplexer applications. Each switch features a digital select input (Sn), two independent inputs/outputs (nY0 and nY1) and a common input/output (nZ). A digital enable input (E) is common to all switches. When E is HIGH, the switches are turned off. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of V . CC 2. Features and benefits Wide analog input voltage range from 5 V to +5 V Complies with JEDEC standard no. 7A Low ON resistance: 80 (typical) at V V =4.5 V CC EE 70 (typical) at V V =6.0 V CC EE 60 (typical) at V V =9.0 V CC EE Logic level translation: to enable 5 V logic to communicate with 5 V analog signals Typical break before make built-in ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V CDM JESD22-C101E exceeds 1000 V Multiple package options Specified from 40 Cto +85 C and 40 Cto +125 C 3. Applications Analog multiplexing and demultiplexing Digital multiplexing and demultiplexing Signal gating74HC4053 74HCT4053 NXP Semiconductors Triple 2-channel analog multiplexer/demultiplexer 4. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74HC4053D 40 C to +125 C SO16 plastic small outline package 16 leads SOT109-1 body width 3.9 mm 74HCT4053D 74HC4053DB 40 C to +125 C SSOP16 plastic shrink small outline package 16 leads SOT338-1 body width 5.3 mm 74HCT4053DB 74HC4053PW 40 C to +125 C TSSOP16 plastic thin shrink small outline package 16 leads SOT403-1 body width 4.4 mm 74HCT4053PW 74HC4053BQ 40 C to +125 C DHVQFN16 plastic dual in-line compatible thermal enhanced very SOT763-1 thin quad flat package no leads 16 terminals 74HCT4053BQ body 2.5 3.5 0.85 mm 5. Functional diagram ( 9 /2&* , 6 / (9(/ 2 1 < /2&* , 6 < / (9(/ 2 1 < /2&* , 6 < / (9(/ 2 1 = 9 DN D Fig 1. Functional diagram 74HC HCT4053 All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2016. All rights reserved. Product data sheet Rev. 9 10 February 2016 2 of 31 (( *1 19(56, &2 = 19(56, &2 = 19(56, &2 < (5 (&2 < &&