74HC573; 74HCT573
Octal D-type transparent latch; 3-state
Rev. 6 26 January 2015 Product data sheet
1. General description
The 74HC573; 74HCT573 is a high-speed Si-gate CMOS device and is pin compatible
with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard
no. 7A.
The 74HC573; 74HCT573 has octal D-type transparent latches featuring separate D-type
inputs for each latch and 3-state true outputs for bus-oriented applications. A latch enable
(LE) input and an output enable (OE) input are common to all latches.
When LE is HIGH, data at the Dn inputs enter the latches. In this condition, the latches are
transparent, i.e. a latch output changes state each time its corresponding D input
changes.
When LE is LOW the latches store the information that was present at the D-inputs a
set-up time preceding the HIGH-to-LOW transition of LE. When OE is LOW, the contents
of the 8 latches are available at the outputs. When OE is HIGH, the outputs go to the
high-impedance OFF-state. Operation of the OE input does not affect the state of the
latches.
The 74HC573; 74HCT573 is functionally identical to:
74HC563; 74HCT563, but inverted outputs
74HC373; 74HCT373, but different pin arrangement
2. Features and benefits
Input levels:
For 74HC573: CMOS level
For 74HCT573: TTL level
Inputs and outputs on opposite sides of package allowing easy interface with
microprocessors
Useful as input or output port for microprocessors and microcomputers
3-state non-inverting outputs for bus-oriented applications
Common 3-state output enable input
Multiple package options
ESD protection:
HBM JESD22-A114F exceeds 2 000 V
MM JESD22-A115-A exceeds 200 V
Specified from 40 Cto+85 C and from 40 Cto+125 C74HC573; 74HCT573
NXP Semiconductors
Octal D-type transparent latch; 3-state
3. Ordering information
Table 1. Ordering information
Type number Package
Temperature range Name Description Version
74HC573N 40 C to +125 C DIP20 plastic dual in-line package; 20 leads (300 mil) SOT146-1
74HCT534N
74HC573D 40 C to +125 C SO20 plastic small outline package; 20 leads; SOT163-1
body width 7.5 mm
74HCT573D
74HC573DB 40 C to +125 C SSOP20 plastic shrink small outline package; 20 leads; SOT339-1
body width 5.3 mm
74HCT573DB
74HC573PW 40 C to +125 C TSSOP20 plastic thin shrink small outline package; 20 leads; SOT360-1
body width 4.4 mm
74HCT573PW
74HC573BQ 40 C to +125 C DHVQFN20 plastic dual in-line compatible thermal enhanced very SOT764-1
thin quad flat package; no leads; 20 terminals;
74HCT573BQ
body 2.5 4.5 0.85 mm
4. Functional diagram
7 $ / 7 ( $ 67
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Fig 1. Functional diagram
74HC_HCT573 All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet Rev. 6 26 January 2015 2 of 21
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