74HCT14N,652

74HC14; 74HCT14 Hex inverting Schmitt trigger Rev. 6 19 September 2012 Product data sheet 1. General description The 74HC14; 74HCT14 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7A. The 74HC14; 74HCT14 provides six inverting buffers with Schmitt-trigger action. It is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. 2. Features and benefits Low-power dissipation ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V Multiple package options Specified from 40 C to +85 C and from 40 C to +125 C 3. Applications Wave and pulse shapers Astable multivibrators Monostable multivibrators74HC14; 74HCT14 NXP Semiconductors Hex inverting Schmitt trigger 4. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74HC14N 40 C to +125 C DIP14 plastic dual in-line package; 14 leads (300 mil) SOT27-1 74HCT14N 74HC14D 40 C to +125 C SO14 plastic small outline package; 14 leads; body width SOT108-1 3.9 mm 74HCT14D 74HC14DB 40 C to +125 C SSOP14 plastic shrink small outline package; 14 leads; body SOT337-1 width 5.3 mm 74HCT14DB 74HC14PW 40 C to +125 C TSSOP14 plastic thin shrink small outline package; 14 leads; SOT402-1 body width 4.4 mm 74HCT14PW 74HC14BQ 40 C to +125 C DHVQFN14 plastic dual in-line compatible thermal enhanced very SOT762-1 thin quad flat package; no leads; 14 terminals; 74HCT14BQ body 2.5 3 0.85 mm 5. Functional diagram 1 2 3 4 1A 1Y 2 1 5 6 2A 2Y 3 4 3A 3Y 5 6 9 8 4A 4Y 9 8 11 10 5A 5Y 11 10 6A 6Y 13 12 12 13 A Y mna025 mna204 001aac497 Fig 1. Logic symbol Fig 2. IEC logic symbol Fig 3. Logic diagram (one Schmitt trigger) 74HC_HCT14 All information provided in this document is subject to legal disclaimers. NXP B.V. 2012. All rights reserved. Product data sheet Rev. 6 19 September 2012 2 of 21