DATASHEET CA3130, CA3130A FN817 Rev.6.00 15MHz, BiMOS Operational Amplifier with MOSFET Input/CMOS Output Aug 1, 2005 CA3130A and CA3130 are op amps that combine the Features advantage of both CMOS and bipolar transistors. MOSFET Input Stage Provides: Gate-protected P-Channel MOSFET (PMOS) transistors are 12 - Very High Z = 1.5 T (1.5 x 10 ) (Typ) I used in the input circuit to provide very-high-input - Very Low I . 5pA (Typ) at 15V Operation I impedance, very-low-input current, and exceptional speed . = 2pA (Typ) at 5V Operation performance. The use of PMOS transistors in the input stage Ideal for Single-Supply Applications results in common-mode input-voltage capability down to Common-Mode Input-Voltage Range Includes 0.5V below the negative-supply terminal, an important Negative Supply Rail Input Terminals can be Swung 0.5V attribute in single-supply applications. Below Negative Supply Rail A CMOS transistor-pair, capable of swinging the output CMOS Output Stage Permits Signal Swing to Either (or voltage to within 10mV of either supply-voltage terminal (at both) Supply Rails very high values of load impedance), is employed as the output circuit. Pb-Free Plus Anneal Available (RoHS Compliant) The CA3130 Series circuits operate at supply voltages Applications ranging from 5V to 16V, ( 2.5V to 8V). They can be phase Ground-Referenced Single Supply Amplifiers compensated with a single external capacitor, and have terminals for adjustment of offset voltage for applications Fast Sample-Hold Amplifiers requiring offset-null capability. Terminal provisions are also Long-Duration Timers/Monostables made to permit strobing of the output stage. High-Input-Impedance Comparators The CA3130A offers superior input characteristics over (Ideal Interface with Digital CMOS) those of the CA3130. High-Input-Impedance Wideband Amplifiers Ordering Information Voltage Followers (e.g. Follower for Single-Supply D/A PART NO. TEMP. PKG. Converter) o (BRAND) RANGE ( C) PACKAGE DWG. Voltage Regulators (Permits Control of Output Voltage CA3130AE -55 to 125 8 Ld PDIP E8.3 Down to 0V) CA3130AM -55 to 125 8 Ld SOIC M8.15 (3130A) Peak Detectors CA3130AM96 -55 to 125 8 Ld SOIC M8.15 (3130A) Tape and Reel Single-Supply Full-Wave Precision Rectifiers CA3130AMZ -55 to 125 8 Ld SOIC M8.15 Photo-Diode Sensor Amplifiers (3130AZ) (Note) (Pb-free) CA3130AMZ96 -55 to 125 8 Ld SOIC M8.15 Pinout (3130AZ) (Note) Tape and Reel (Pb-free) CA3130E CA3130, CA3130A -55 to 125 8 Ld PDIP E8.3 (PDIP, SOIC) CA3130EZ -55 to 125 8 Ld PDIP* E8.3 TOP VIEW (Note) (Pb-free) CA3130M -55 to 125 8 Ld SOIC M8.15 (3130) OFFSET 1 8 STROBE CA3130M96 -55 to 125 8 Ld SOIC M8.15 NULL (3130) INV. Tape and Reel 2 7 V+ - INPUT CA3130MZ -55 to 125 8 Ld SOIC M8.15 NON-INV. + 3 6 OUTPUT (3130MZ) (Note) (Pb-free) INPUT CA3130MZ96 -55 to 125 8 Ld SOIC M8.15 V- 4 5 OFFSET NULL (3130MZ) Tape and Reel (Pb-free) *Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications. NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. FN817 Rev.6.00 Page 1 of 17 Aug 1, 2005CA3130, CA3130A Absolute Maximum Ratings Thermal Information o o DC Supply Voltage (Between V+ And V- Terminals) 16V Thermal Resistance (Typical, Note 2) ( C/W) ( C/W) JA JC Differential Input Voltage 8V PDIP Package* 115 N/A DC Input Voltage (V+ +8V) to (V- -0.5V) SOIC Package . 160 N/A o Input-Terminal Current 1mA Maximum Junction Temperature (Plastic Package) 150 C o o Output Short-Circuit Duration (Note 1) Indefinite Maximum Storage Temperature Range -65 C to 150 C o Maximum Lead Temperature (Soldering 10s) .300 C Operating Conditions (SOIC - Lead Tips Only) o o Temperature Range . -50 C to 125 C *Pb-free PDIPs can be used for through hole wave solder process- ing only. They are not intended for use in Reflow solder processing applications. CAUTION: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES: 1. Short circuit may be applied to ground or to either supply. 2. is measured with the component mounted on an evaluation PC board in free air. JA o Electrical Specifications T = 25 C, V+ = 15V, V- = 0V, Unless Otherwise Specified A CA3130 CA3130A TEST PARAMETER SYMBOL CONDITIONS MIN TYP MAX MIN TYP MAX UNITS Input Offset Voltage V V = 7.5V - 8 15 - 2 5 mV IO S o Input Offset Voltage V / T - 10 - - 10 - V/ C IO Temperature Drift Input Offset Current I V = 7.5V - 0.5 30 - 0.5 20 pA IO S Input Current I V = 7.5V - 5 50 - 5 30 pA I S Large-Signal Voltage Gain A V = 10V 50 320 - 50 320 - kV/V OL O P-P R = 2k L 94 110 - 94 110 - dB Common-Mode CMRR 70 90 - 80 90 - dB Rejection Ratio Common-Mode Input V 0 -0.5 to 12 10 0 -0.5 to 12 10 V ICR Voltage Range Power-Supply V / V V = 7.5V - 32 320 - 32 150 V/V IO S S Rejection Ratio Maximum Output Voltage V +R = 2k 12 13.3 - 12 13.3 - V OM L V-R = 2k - 0.002 0.01 - 0.002 0.01 V OM L V +R = 14.99 15 - 14.99 15 - V OM L V-R = - 0 0.01 - 0 0.01 V OM L Maximum Output Current I + (Source) at V = 0V 122245 122245 mA OM O I - (Sink) at V = 15V 12 20 45 12 20 45 mA OM O Supply Current I+ V = 7.5V, - 10 15 - 10 15 mA O R = L I+ V = 0V, -2 3 - 2 3 mA O R = L FN817 Rev.6.00 Page 2 of 17 Aug 1, 2005