DATASHEET DG406, DG407 FN3116 Rev 11.00 Single 16-Channel/Differential 8-Channel, CMOS Analog Multiplexers October 1, 2013 The DG406 and DG407 monolithic CMOS analog multiplexers Features are drop-in replacements for the popular DG506A and ON-Resistance (Max) .100 DG507A series devices. They each include an array of sixteen analog switches, a TTL and CMOS compatible digital decode Low Power Consumption (P ) <1.2mW D circuit for channel selection, a voltage reference for logic Fast Transition Time (Max) . 300ns thresholds, and an ENABLE input for device selection when Low Charge Injection several multiplexers are present. TTL, CMOS Compatible These multiplexers feature lower signal ON-resistance (<100) and faster transition time (t < 300ns) Single or Split Supply Operation TRANS compared to the DG506A and DG507A. Charge injection has Pb-Free (RoHS Compliant) been reduced, simplifying sample and hold applications. Applications The improvements in the DG406 series are made possible by using a high voltage silicon-gate process. An epitaxial layer Battery Operated Systems prevents the latch-up associated with older CMOS Data Acquisition technologies. The 44V maximum voltage range permits controlling 30V signals when operating with 15V power Medical Instrumentation P-P supplies. Hi-Rel Systems The sixteen switches are bilateral, equally matched for AC or Communication Systems bidirectional signals. The ON-resistance variation with analog Automatic Test Equipment signals is quite low over a 5V analog input range. Related Literature Technical Brief TB363 Guidelines for Handling and Processing Moisture Sensitive Surface Mount Devices (SMDs) 80 70 DG406 +125C MUX 60 +85C 50 +25C BUFFER ANALOG 40 INPUTS CPU ADC 0C 30 -40C 20 -55C V+ = 15V 10 V- = -15V 0 -15 -10 -5015 105 V , DRAIN VOLTAGE (V) D FIGURE 1. TYPICAL APPLICATION FIGURE 2. 15 DUAL SUPPLY r CURVES AT VARIOUS ON TEMPERATURES FN3116 Rev 11.00 Page 1 of 15 October 1, 2013 r , ON-RESISTANCE (W) DS(ON)DG406, DG407 Pin Configurations DG406 DG407 (28 LD PDIP, SOIC) (28 LD PDIP, SOIC) TOP VIEW TOP VIEW V+ 1 28 D V+ 1 28 D A NC 2 27 V- D 2 27 V- B NC 3 26 S 3 NC 26 S 8 8A S 4 25 S S 4 25 S 16 7 8B 7A 24 S S 5 S 5 24 S 15 6 7B 6A S 6 23 S S 6 23 S 14 5 5A 6B S 7 22 S 22 S 4 S 7 13 5B 4A S 8 21 S S 8 21 S 12 3 4B 3A S 9 20 S S 9 20 S 11 2 3B 2A S 10 19 S 10 1 S 10 19 S 1A 2B S 11 18 EN S 11 18 EN 9 1B GND 12 17 A GND 12 17 A 0 0 NC 13 16 A 1 NC 13 16 A 1 A 14 15 A 3 2 NC 14 15 A 2 Pin Description DG406 DG407 (PDIP, SOIC) (PDIP, SOIC) SYMBOL DESCRIPTION 1 1 V+ Positive Power Supply 2, 3, 13 3, 13, 14, NC No Connect- No Internal Connection 4, 5, 6, 7, 8, 9, 10, 11 - S thru S Source Switch Terminals (These pins can be an input or output) 16 9 12 12 GND Ground (0V) Reference 14, 15, 16, 17 - A thru A Logic Control Inputs 3 0 - 15, 16, 17 A thru A Logic Control Inputs 2 0 18 18 EN Active High Digital Input (When low device is disabled and all switches are turned off. When high the Ax logic inputs determine which switch is turned on. 19, 20, 21, 22, 23, 24, 25, - S1 thru S8 Source Switch Terminals (These pins can be an input or output) 26 27 27 V Negative Power Supply (Single supply application this pin will be connected - to ground.) 28 - D Drain Switch Terminal (This pin can be an input or output) -2, 28 D , D Drain Switch Terminal (This pin can be an input or output) B A - 4, 5, 6, 7, 8, 9, 10, 11 S thru S Source Switch Terminals B (These pins can be an input or output) 1B 8B - 19, 20, 21, 22, 23, 24, 25, S thru S Source Switch Terminals A (These pins can be an input or output) 1A 8A 26 FN3116 Rev 11.00 Page 2 of 15 October 1, 2013