DG884 Vishay Siliconix 8 x 4 Wideband Video Crosspoint Array DESCRIPTION FEATURES The DG884 contains a matrix of 32 T-switches configured in Routes Any Input to Any Output an 8 x 4 crosspoint array. Any of the IN/OUT pins may be Pb-free Wide Bandwidth: 300 MHz Available used as an input or output. Any of the IN pins may be Low Crosstalk: - 85 dB at 5 MHz RoHS* switched to any or simultaneously to all OUT pins. Double Buffered TTL-Compatible COMPLIANT Latches with Readback The DG884 is built on a proprietary D/CMOS process that Low r : 45 combines low capacitance switching DMOS FETs with low DS(on) power CMOS control logic and drivers. The ground lines Optional Negative Supply between adjacent signal input pins help to reduce crosstalk. The low on-resistance and low on-capacitance of the DG884 BENEFITS make it ideal for video and wideband signal routing. Reduced Board Space Improved System Bandwidth Control data is loaded individually into four Next Event Improved Channel Off-Isolation latches. When all Next Event latches have been programmed, data is transferred into the Current Event Simplified Logic Interfacing latches via a SALVO command. Current Event latch data Allows Bipolar Signal Swings readback is available to poll array status. Reduced Insertion Loss High Reliability Output disable capabilities make it possible to parallel multiple DG884s to form larger switch arrays. DIS outputs APPLICATIONS provide control signals used to place external buffers in a power saving mode. Wideband Signal Routing and Multiplexing High-End Video Systems For additional information see applications note AN504 NTSC, PAL, SECAM Switchers (FaxBack document number 70610). Digital Video Routing ATE Systems FUNCTIONAL BLOCK DIAGRAM IN IN IN IN IN IN IN IN 1 2 3 4 5 6 7 8 OUT 1 OUT 2 8 4 Switch Matrix OUT 3 OUT 4 Decode Logic, Switch Drivers 4 Disable Outputs RS Current Event Latches WR SALVO CS I/O Control Logic B 1 Next Event Latches B 0 I/O A A A A 3 2 1 0 * Pb containing terminations are not RoHS compliant, exemptions may apply Document Number: 70071 www.vishay.com S-71241Rev. H, 25-Jun-07 1DG884 Vishay Siliconix PIN CONFIGURATION AND ORDERING INFORMATION 6543 2 1 4443424140 IN DGND 2 7 39 GND V 38 8 L IN RS 3 9 37 GND SALVO 36 10 ORDERING INFORMATION IN WR 4 35 11 Temp Range Package Part Number GND 34 A 3 12 PLCC and CLCC DG884DN - 40 to 85 C 44-Pin PLCC IN A 5 2 13 33 DG884DN-E3 Top View GND 32 A 14 1 IN A 6 0 31 15 GND CS 30 16 IN 29 I/O 7 17 18 19 20 21 22 23 24 25 26 27 28 TRUTH TABLE I RS I/O CS WR SALVO Actions 1 0 1 1 No change to Next Event latches 1 0 0 1 Next Event latches loaded as defined in table below 10001 Next Event latches are transparent 1 0 0 1 Next Event data latched-in Data in all Next Event latches is simultaneously loaded into the Current Event latches, 10 X 1 i.e., all new crosspoint addresses change simultaneously when SALVO goes low 1 0 0 X 0 Current Event latches are transparent 1 0 X 1 Current Event data latched-in 10000 Both next and Current Event latches are transparent A , A , A , A - High impedance 11111 0 1 2 3 A , A , A , A become outputs and reflect the contents of the Current Event latches 0 1 2 3 11011 B , B determine which Current Event latches are being read 0 1 0 X X 1 1 All crosspoints opened (but data in Next Event latches is preserved) All other states are not recommended. www.vishay.com Document Number: 70071 2 S-71241Rev. H, 25-Jun-07 GND GND IN IN 8 1 GND GND V GND DIS OUT 1 1 DIS GND 2 DIS OUT 3 2 DIS GND 4 V+ OUT 3 B GND 0 B OUT 1 4