83-1BC

MicroConverter , Multi-Channel 12-bit ADCs and DACs with Embedded FLASH MCU ADuC831 Errata Sheet A. This Errata sheet contains the following known bugs, anomalies and work-arounds for the ADuC831 MicroConverter 831 S01. NUMBER OF ADC CLOCKS IN PIPLINED MODE 831 S02. USE OF TIME INTERVAL COUNTER IN POWER DOWN MODE 831 S03. DAC CLEAR BIT FUNCTIONALITY 831 S04. EXTENDED (11-BIT) STACK POINTER - PUSH AND POP OPERATION B. The Errata listed, apply to all ADuC831 packaged material branded as follows: First Line: ADuC831XX Fourth Line: BXX C. Analog Devices Inc. is committed, through future silicon revisions to continuously improve silicon functionality. Analog Devices Inc. will use its best endeavors to ensure that these future silicon revisions remain compatible with your present software/systems that implement the recommended work-arounds outlined in this document. REV. B.1 November/2002 MicroConverter is a Trademark of Analog Devices, Inc. Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or Tel: 781/329-4700 World Wide Web Site: ADuC831 Errata Sheet 831 S01. NUMBER OF ADC CLOCKS IN PIPLINED MODE Backgound: An adc conversion takes 16 ADC clocks plus the selected acquisition clocks. Issue: At voltages below 3.5V in piplined mode the number of ADC clocks required for a conversion can vary between 15 and 16 ADC clocks. Work-Around : none. Related Issues : This issue does not affect the performance of the ADC. 831 S02. USE OF TIME INTERVAL COUNTER IN POWER DOWN MODE Backgound: The Time Interval Counter (TIC) can be used to time longer intervals than the standard 8052 timers are capable of. It can be used to interrupt or wake up the ADuC831 after a specific interval has elapsed. There are five ways of terminating power down mode on the ADuC831. Three of these ways namely, TIC interrupt, I2C/SPI interrupt or INTO interrupt resume code execution at the point where it was powered down. Issue: When the TIC is activate (i.e. TIMECON.1 = 1)during power down a wake up interrupt from any source may trigger a full Power-On-Reset event instead of resuming code execution at the point where it was powered down. This results in all SFRs being reset to their default values. Work-Around : A bit can be set in dataflash prior to powerdown. By monitoring this bit at the start of code execution the user can determine if the reset was due to a wake up from powerdown. Related Issues : This issue does not affect wake up from powerdown if TIMECON.1=0 831 S03. DAC CLEAR BIT FUNCTIONALITY Backgound: The DAC outputs are controlled by the SFR DACCON. The CLR1 and CLR0 bits in DACCON can be used to force the output of DAC1 and DAC0 to 0V. Issue: When the DAC is enabled and in buffered mode setting the CLR1 or CLR0 bits may cause a momentary spike on the DAC ouput before the DAC is forced to 0V. Work-Around : To force the output of DAC1 or DAC0 to 0V write 0000H to the corresponding DAC data registers. Related Issues : none. 2 of 3 REV. B.1 November/2002