Low Power, 24-Bit, 31.25 kSPS, Sigma-Delta ADC with True Rail-to-Rail Buffers Data Sheet AD7172-2 FEATURES GENERAL DESCRIPTION Fast and flexible output rate: 1.25 SPS to 31.25 kSPS The AD7172-2 is an intelligent, low noise, low power, multiplexed, Channel scan data rate of 6.21 kSPS/channel (161 s settling) - analog-to-digital converter (ADC) with 2- or 4-channel Performance specifications (fully differential/single-ended) inputs for low bandwidth 17.2 noise free bits at 31.25 kSPS signals. The AD7172-2 has a maximum channel scan rate of 24 noise free bits at 5 SPS 6.21 kSPS (161 s) for fully settled data. The output data rates INL: 2 ppm of FSR range from 1.25 SPS to 31.25 kSPS. 85 dB rejection of 50 Hz and 60 Hz with 50 ms settling The AD7172-2 integrates key analog and digital signal condition- User configurable input channels ing blocks to allow users to configure an individual setup for each 2 fully differential channels or 4 single-ended channels analog input channel in use via the SPI. Integrated true rail-to-rail Crosspoint multiplexer buffers on the analog inputs and external reference inputs provide On-chip 2.5 V reference (2 ppm/C drift) easy to drive high impedance inputs. The precision 2.5 V low drift True rail-to-rail analog and reference input buffers (2 ppm/C) band gap internal reference (with an output reference Internal or external clock buffer) adds embedded functionality to reduce the external Power supply component count. AVDD1 = 3.0 V to 5.5 V, AVDD2 = IOVDD = 2 V to 5.5 V The digital filter allows simultaneous 50 Hz and 60 Hz rejection Split supply with AVDD1 and AVSS at 2.5 V or 1.65 V at a 27.27 SPS output data rate. The user can switch between ADC current: 1.5 mA different filter options according to the demands of each channel in Temperature range: 40C to +105C the application, with further digital processing functions such as 3- or 4-wire serial digital interface (Schmitt trigger on SCLK) offset and gain calibration registers, which are also configurable on Serial port interface (SPI), QSPI-, MICROWIRE-, and DSP- a per channel basis. General-purpose inputs/outputs (GPIOs) compatible control external multiplexers synchronous to the ADC conversion APPLICATIONS timing. Process control: PLC/DCS modules The specified operating temperature range is 40C to +105C. Temperature and pressure measurement The AD7172-2 is in a 24-lead TSSOP package. Medical and scientific multichannel instrumentation Note that, throughout this data sheet, the dual function pin Chromatography names are referenced by the relevant function only. FUNCTIONAL BLOCK DIAGRAM AVDD1 AVDD2 REGCAPA REF REF+ REFOUT IOVDD REGCAPD CROSSPOINT AVDD1 MULTIPLEXER 1.8V 1.8V AVSS BUFFERED LDO LDO PRECISION REFERENCE RAIL-TO-RAIL AIN0 INT AVDD REFERENCE REF INPUT BUFFERS CS AIN1 SCLK SERIAL DIGITAL INTERFACE - ADC DIN AIN2 FILTER AND CONTROL DOUT/RDY AIN3 RAIL-TO-RAIL SYNC/ERROR GPIO AND XTAL AND INTERNAL ANALOG INPUT MUX CLOCK OSCILLATOR BUFFERS AVSS I/O CONTROL CIRCUITRY AIN4 AD7172-2 TEMPERATURE SENSOR AVSS GPIO0 GPIO1 XTAL1 XTAL2/CLKIO DGND Figure 1. Rev. A Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20142016 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com 12672-001AD7172-2 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 CRC Calculation ......................................................................... 42 Applications ....................................................................................... 1 Integrated Functions ...................................................................... 44 General Description ......................................................................... 1 General-Purpose Input/Output................................................ 44 Functional Block Diagram .............................................................. 1 External Multiplexer Control ................................................... 44 Revision History ............................................................................... 3 Delay ............................................................................................ 44 Specifications ..................................................................................... 4 16-Bit/24-Bit Conversions......................................................... 44 Timing Characteristics ................................................................ 7 DOUT RESET ........................................................................... 44 Timing Diagrams .......................................................................... 8 Synchronization .......................................................................... 44 Absolute Maximum Ratings ............................................................ 9 Error Flags ................................................................................... 45 Thermal Resistance ...................................................................... 9 DATA STAT ............................................................................... 45 ESD Caution .................................................................................. 9 IOSTRENGTH ........................................................................... 46 Pin Configuration and Function Descriptions ........................... 10 Internal Temperature Sensor .................................................... 46 Typical Performance Characteristics ........................................... 12 Grounding and Layout .................................................................. 47 Noise Performance and Resolution .............................................. 19 Register Summary .......................................................................... 48 Getting Started ................................................................................ 20 Register Details ............................................................................... 49 Power Supplies ............................................................................ 21 Communications Register ......................................................... 49 Digital Communication ............................................................. 21 Status Register ............................................................................. 50 AD7172-2 Reset .......................................................................... 22 ADC Mode Register ................................................................... 51 Configuration Overview ........................................................... 22 Interface Mode Register ............................................................ 52 Circuit Description ......................................................................... 27 Register Check ............................................................................ 53 Buffered Analog Input ............................................................... 27 Data Register ............................................................................... 53 Crosspoint Multiplexer .............................................................. 27 GPIO Configuration Register ................................................... 54 AD7172-2 Reference .................................................................. 28 ID Register................................................................................... 55 Buffered Reference Input ........................................................... 29 Channel Register 0 ..................................................................... 55 Clock Source ............................................................................... 29 Channel Register 1 to Channel Register 3 .............................. 56 Digital Filters ................................................................................... 30 Setup Configuration Register 0 ................................................ 57 Sinc5 + Sinc1 Filter ..................................................................... 30 Setup Configuration Register 1 to Setup Configuration Register 3 ..................................................................................... 57 Sinc3 Filter ................................................................................... 30 Filter Configuration Register 0 ................................................. 58 Single Cycle Settling ................................................................... 31 Filter Configuration Register 1 to Filter Configuration Enhanced 50 Hz and 60 Hz Rejection Filters ......................... 34 Register 3 ..................................................................................... 59 Operating Modes ............................................................................ 37 Offset Register 0 ......................................................................... 59 Continuous Conversion Mode ................................................. 37 Offset Register 1 to Offset Register 3 ....................................... 59 Continuous Read Mode ............................................................. 38 Gain Register 0............................................................................ 59 Single Conversion Mode ........................................................... 39 Gain Register 1 to Gain Register 3 ........................................... 59 Standby and Power-Down Modes ............................................ 40 Outline Dimensions ....................................................................... 60 Calibration ................................................................................... 40 Ordering Guide .......................................................................... 60 Digital Interface .............................................................................. 41 Checksum Protection................................................................. 41 Rev. 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