Product Information

CY62138FLL-45SXIT

CY62138FLL-45SXIT electronic component of Infineon

Datasheet
SRAM 2Mb 45ns 256K x 8 Low Power SRAM

Manufacturer: Infineon
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

1000: USD 3.3512 ea
Line Total: USD 3351.2

0 - Global Stock
MOQ: 1000  Multiples: 1000
Pack Size: 1000
Availability Price Quantity
0 - Global Stock


Ships to you between Wed. 01 May to Tue. 07 May

MOQ : 1000
Multiples : 1000
1000 : USD 3.8745

0 - Global Stock


Ships to you between Wed. 01 May to Tue. 07 May

MOQ : 1000
Multiples : 1000
1000 : USD 3.3512

0 - Global Stock


Ships to you between Tue. 07 May to Thu. 09 May

MOQ : 1
Multiples : 1
1 : USD 5.8765
10 : USD 5.382
100 : USD 4.8875
250 : USD 4.8645
500 : USD 4.6345
1000 : USD 4.416
2000 : USD 4.301
5000 : USD 4.301
10000 : USD 4.301

     
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CY62138F MoBL 2-Mbit (256 K 8) Static RAM 2-Mbit (256 K 8) Static RAM Features Functional Description High speed: 45 ns The CY62138F is a high performance CMOS static RAM organized as 256K words by 8 bits. This device features Wide voltage range: 4.5 V to 5.5 V advanced circuit design to provide ultra low active current. This is ideal for providing More Battery Life (MoBL ) in portable Pin compatible with CY62138V applications. The device also has an automatic power down Ultra low standby power feature that significantly reduces power consumption when Typical standby current: 1 A addresses are not toggling. Placing the device into standby mode reduces power consumption by more than 99% when Maximum standby current: 5 A deselected (CE HIGH or CE LOW). 1 2 Ultra low active power To write to the device, take Chip Enable (CE LOW and CE 1 2 Typical active current: 1.6 mA f = 1 MHz HIGH) and Write Enable (WE) inputs LOW. Data on the eight I/O Easy memory expansion with CE , CE and OE features pins (I/O through I/O ) is then written into the location specified 1 2, 0 7 on the address pins (A through A ). 0 17 Automatic power down when deselected To read from the device, take Chip Enable (CE LOW and CE 1 2 Complementary metal oxide semiconductor (CMOS) for HIGH) and output enable (OE) LOW while forcing Write Enable optimum speed and power (WE) HIGH. Under these conditions, the contents of the memory location specified by the address pins appear on the I/O pins. Available in Pb-free 32-pin SOIC and 32-pin thin small outline package (TSOP) II packages The eight input and output pins (I/O through I/O ) are placed in 0 7 a high impedance state when the device is deselected (CE 1 HIGH or CE LOW), the outputs are disabled (OE HIGH), or 2 during a write operation (CE LOW and CE HIGH and WE 1 2 LOW). The CY62138F device is suitable for interfacing with processors that have TTL I/P levels. It is not suitable for processors that require CMOS I/P levels. Please see Electrical Characteristics on page 4 for more details and suggested alternatives. Logic Block Diagram Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 001-13194 Rev. *H Revised August 19, 2013 CY62138F MoBL Contents Pin Configurations ...........................................................3 Ordering Information ...................................................... 11 Product Portfolio ..............................................................3 Ordering Code Definitions ......................................... 11 Maximum Ratings .............................................................4 Package Diagrams .......................................................... 12 Operating Range ...............................................................4 Acronyms ........................................................................14 Electrical Characteristics .................................................4 Documents Conventions ............................................... 14 Capacitance ......................................................................5 Units of Measure ....................................................... 14 Thermal Resistance ..........................................................5 Document History Page ................................................. 15 AC Test Loads and Waveforms .......................................5 Sales, Solutions, and Legal Information ...................... 16 Data Retention Characteristics .......................................6 Worldwide Sales and Design Support ....................... 16 Data Retention Waveform ................................................6 Products ....................................................................16 Switching Characteristics ................................................7 PSoC Solutions ...................................................... 16 Switching Waveforms ......................................................8 Cypress Developer Community ................................. 16 Truth Table ......................................................................10 Technical Support ..................................................... 16 Document Number: 001-13194 Rev. *H Page 2 of 16

Tariff Desc

8542.32.00 31 No ..Random Access Memory (RAM) including Single Inline Memory Modules (SIMMS), Dual Inline Memory Modules (DIMMS), Dynamic Random Access Memory (DRAM), Synchronous Dynamic Random Access Memory (SD RAM), Rambus Dynamic Random Access Memory (RD RAM) and other similar memory
CYP
Cypress
Cypress / Spansion
CYPRESS SEMI
Cypress Semicon
Cypress Semiconductor
Cypress Semiconductor Corp
INF
INFINEON
Infineon IR
INFINEON (CYPRESS)
Infineon (IRF)
Infineon / Cypress
Infineon / IR
INFINEON TECH ICs
Infineon Technologies
INFINEON TECHNOLOGIES AG
Infineon Technologies Americas Corp.
Infinite Power Solutions
INTERNATIONAL RECTIF
INTERNATIONAL RECTIFIER
International Rectifier HiRel Products
INTL RECTIFIER
IR
IRH
Ramtron
Ramtron / Cypress Semiconductor
Ramtron International Corp
SP9
SPANSION

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