MT8808 ISO-CMOS 8 x 8 Analog Switch Array Data Sheet September 2011 Features Internal control latches and address decoder Ordering Information Short set-up and hold times MT8808AP1 28 Pin PLCC* Tubes MT8808APR1 28 Pin PLCC* Tape & Reel Wide operating voltage: 4.5 V to 13.2 V MT8808AE1 28 Pin PDIP* Tubes 12 Vpp analog signal capability * Pb Free Matte Tin R 65 max. V = 12 V, 25 C ON DD -40 C to +85 C R 10 V = 12 V, 25 C ON DD Full CMOS switch for low distortion Minimum feedthrough and crosstalk Description Separate analog and digital reference supplies The Zarlink MT8808 is fabricated in Zarlinks ISO- Low power consumption ISO-CMOS technology CMOS technology providing low power dissipation and high reliability. The device contains a 8 x 8 array of Applications crosspoint switches along with a 6 to 64 line decoder and latch circuits. Any one of the 64 switches can be Key systems addressed by selecting the appropriate six address PBX systems bits. The selected switch can be turned on or off by applying a logical one or zero to the DATA input. V is SS Mobile radio the ground reference of the digital inputs. The range of Test equipment /instrumentation the analog signal is from V to V . DD EE Analog/digital multiplexers Audio/Video switching STROBE DATA RESET VDD VEE VSS 11 AX0 AX1 8 x 8 AX2 6 to 64 Switch Xi I/O Latches Decoder (i=0-7) AY0 Array AY1 64 64 AY2 Yi I/O (i 0 7) Figure 1 - Functional Block Diagram 1 Zarlink Semiconductor Inc. Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc. Copyright 1997-2011, Zarlink Semiconductor Inc. All Rights Reserved.MT8808 Data Sheet 1 28 AY2 AY1 2 27 STROBE AY0 26 VEE 3 AX2 25 DATA 4 AX1 AX1 VSS 5 24 VSS 5 25 AX0 X0 6 24 AX0 X0 23 6 X1 X2 7 23 X1 X2 22 7 X3 X4 8 22 X3 X4 21 8 X5 X6 9 21 X5 X6 20 9 X7 RESET 10 20 X7 RESET 19 VDD 10 11 19 Y7 VDD Y7 18 Y0 11 Y6 17 Y1 12 Y5 16 Y2 13 Y4 14 15 Y3 28 PIN PLCC 28 PIN PLASTIC DIP Figure 2 - Pin Connections Change Summary Changes from the May 2005 issue to the September 2011 issue. Page Item Change 1 Ordering Information Removed leaded packages as per PCN notice. Pin Description Pin Name Description 1AY2 AY2 Address Line (Input). 2STROBE STROBE (Input): enables function selected by address and data. Address must be stable before STROBE goes high and DATA must be stable on the falling edge of the STROBE. Active High. 3V Negative Power Supply. EE 4DATA DATA (Input): a logic high input will turn on the selected switch and a logic low will turn off the selected switch. Active High. 5V Digital Ground Reference. SS 6-9 X0, X2, X0, X2, X4 and X6 Analog (Inputs/Outputs): these are connected to the X0, X2, X4 and X4, X6 X6 rows of the switch array. 10 RESET Master RESET (Input): this is used to turn off all switches. Active High. 11-18 Y7 - Y0 Y7 - Y0 Analog (Inputs/Outputs): these are connected to the Y0 - Y7 columns of the switch array. 19 V Positive Power Supply. DD 2 Zarlink Semiconductor Inc. 12 4 13 3 14 2 15 1 16 28 17 27 18 26 DATA VEE STROBE AY2 AY1 AY0 AX2 Y1 Y6 Y5 Y4 Y3 Y2 Y0