CPC7695 Line Card Access Switch INTEGRATED CIRCUITS DIVISION Features Description Improved switch dV/dt immunity of 1500V/s The CPC7695 is a member of IXYS Integrated Drop-In Replacement for CPC7595 Circuits Divisions third-generation Line Card Access Replaces CPC7585, and allows removal of Switch (LCAS) family. This monolithic 10-pole line power-up control discrete components card access switch is available in a 20-pin or 28-pin Enhanced Ringing Test Switch, SW8, breakdown SOIC package. It provides the necessary functions to voltage replace three 2-Form-C electromechanical relays on TTL logic level inputs for 3.3V logic interfaces analog line cards or combined voice and data line Smart logic for power-up / hot-plug state control cards found in central office, access, and PBX Small 20-pin or 28-pin SOIC Package equipment. The device contains solid state switches Monolithic IC reliability for tip and ring line break, ringing injection, and test Low, matched, R access. The CPC7695 requires only a +5V supply and ON provides stable start-up conditioning during system Eliminates the need for zero-cross switching power-up and for hot-plug insertion. Once active, the Flexible switch timing for transition from Ringing inputs respond to traditional TTL logic levels, enabling mode toTalk mode. the CPC7695 to be used with 3.3V-only logic. Clean, bounce-free switching SLIC tertiary protection via integrated current limiting, voltage clamping, and thermal shutdown Ordering Information 5V operation with power consumption <10.5 mW CPC7695 part numbers are specified as shown here: Intelligent battery monitor B - 28-pin SOIC delivered 29/Tube, 1000/Reel Z - 20-pin SOIC delivered 40/Tube, 1000/Reel Applications Standard voice linecards Integrated Voice and Data (IVD) linecards CPC7695 x x xx TR - Add for Tape & Reel Version Central office (CO) Digital Loop Carrier (DLC) A - With Protection SCR PBX Systems B - Without Protection SCR Digitally Added Main Line (DAML) C - With Protection SCR and Additional Test State Fiber in the Loop (FITL) Pair Gain System Channel Banks T (T ) TESTin CHANTEST +5V T (T ) TESTout DROPTEST DC T 10 8 RINGING 5 12 V DD SW7 CPC7695 X SW5 SW3 Tip XX SW9 X 6 T 7 T LINE BAT X SW1 Secondary SLIC Protection Ring SW2 R 22 23 R LINE BAT X 17 IN TESTin L SW6 SW4 XSW10 X X SCR 16 Switch IN A RINGING V Trip REF 15 Control T IN TESTout Circuit Logic C X 18 H LATCH SW8 19 20 R 24 1 14 13 28 R (R ) RINGING TESTout DROPTEST F T GND SD D GND 300 (min.) V BAT RINGING V NOTE 1: Pin assignments are for the 28-pin package. BAT R (R ) TESTin CHANTEST NOTE 2: Block diagram shown with the optional protection SCR. DS-CPC7695-R01 www.ixysic.com 1CPC7695 INTEGRATED CIRCUITS DIVISION 1. Specifications 3 1.1 Package Pinout . 3 1.2 Pinout . 3 1.3 Absolute Maximum Ratings 4 1.4 ESD Rating 4 1.5 General Conditions 4 1.6 Switch Specifications . 5 1.6.1 Break Switches: SW1 and SW2 . 5 1.6.2 Ringing Return Switch: SW3 6 1.6.3 Ringing Switch: SW4 . 7 1.6.4 TESTout Switches: SW5 and SW6 . 8 1.6.5 Ringing Test Return Switch: SW7 9 1.6.6 Ringing Test Switch: SW8 10 1.6.7 TESTin Switches: SW9 and SW10 11 1.7 Digital I/O Electrical Specifications . 12 1.8 Voltage and Power Specifications 13 1.9 Protection Circuitry Electrical Specifications 14 1.10 Truth Tables 15 1.10.1 Truth Table for CPC7695xA and CPC7695xB 15 1.10.2 Truth Table for CPC7695xC 15 2. Functional Description 16 2.1 Introduction . 16 2.2 Start-up 16 2.3 Data Latch 16 2.4 T Pin Description . 17 SD 2.5 Under Voltage Switch Lock Out Circuitry . 17 2.5.1 Overview 17 2.5.2 Hot-Plug and Power-Up Design Considerations 17 2.6 V Pin 18 BAT 2.6.1 Protection . 18 2.6.2 Battery Voltage Monitor 18 2.7 Ringing To Talk State Switch Timing 18 2.7.1 Make-Before-Break Operation . 18 2.7.2 Break-Before-Make Operation . 19 2.7.3 Alternate Break-Before-Make Operation 20 2.8 Ringing Switch Zero-Cross Current Turn Off 20 2.9 Power Supplies 20 2.10 Protection 21 2.10.1 Current Limiting Function 21 2.10.2 Diode Bridge/SCR 21 2.10.3 Thermal Shutdown . 21 2.11 External Protection Elements . 22 3. Manufacturing Information . 23 3.1 Moisture Sensitivity . 23 3.2 ESD Sensitivity 23 3.3 Reflow Profile 23 3.4 Board Wash . 23 3.5 Mechanical Dimensions and PCB Land Patterns 24 3.6 Tape and Reel Specifications . 25 2 www.ixysic.com R01