NOT RECOMMENDED FOR NEW DESIGNS SY100S331 Micrel, Inc. TRIPLE D SY100S331 FLIP-FLOP FEATURES DESCRIPTION Max. toggle frequency of 800MHz The SY100S331 offers three D-type, edge-triggered master/ slave flip-flops with true and complement outputs, designed Differential outputs for use in high-performance ECL systems. Each flip-flop is IEE min. of 80mA controlled by a common clock (CPc), as well as its own clock Industry standard 100K ECL levels pulse (CPn). The resultant clock signal controlling the flip-flop Extended supply voltage option: is the logical OR operation of these two clock signals. Data VEE = 4.2V to 5.5V enters the master when both CPc and CPn are LOW and enters the slave on the rising edge of either CPc or CPn (or both). Voltage and temperature compensation for improved Additional control signals include Master Set (MS) and noise immunity Master Reset (MR) inputs. Each flip-flop also has its own Internal 75k input pull-down resistors Direct Set (SDn) and Direct Clear (CDn) signals. The MR, MS, 150% faster than Fairchild SDn and DCn signals override the clock signals. The inputs 40% lower power than Fairchild on this device have 75k pull-down resistors. Function and pinout compatible with Fairchild F100K Available in 28-pin PLCC package BLOCK DIAGRAM PIN NAMES Pin Function CP0 CP2 Individual Clock Inputs CPc Common Clock Input D0 D2 Data Inputs CD0 CD2 Individual Direct Clear Inputs SDn Individual Direct Set Inputs MR Master Reset Input MS Master Set Input Q0 Q2 Data Outputs Q0 Q2 Complementary Data Outputs VEES VEE Substrate VCCA VCCO for ECL Outputs Rev.: I Amendment: /0 M9999-060910 1 Issue Date: June 2010 hbwhelp micrel.com or (408) 955-1690SY100S331 Micrel, Inc. PACKAGE/ORDERING INFORMATION Ordering Information Package Operating Package Lead Part Number Type Range Marking Finish SY100S331JC J28-1 Commercial SY100S331JC Sn-Pb (1) SY100S331JCTR J28-1 Commercial SY100S331JC Sn-Pb (2) SY100S331JZ J28-1 Commercial SY100S331JZ with Matte-Sn Pb-Free bar-line indicator (1, 2) SY100S331JZTR J28-1 Commercial SY100S331JZ with Matte-Sn Pb-Free bar-line indicator SY100S331JY with (2) Matte-Sn SY100S331JY J28-1 Industrial Pb-Free bar-line indicator SY100S331JY with (1,2) Matte-Sn SY100S331JYTR Industrial J28-1 Pb-Free bar-line indicator 28-Pin PLCC (J28-1) Notes: 1. Tape and Reel. 2. Pb-Free package is recommended for new designs. TRUTH TABLES (1) (1) Asynchronous Operation Synchronous Operation Inputs Outputs Inputs Outputs MS MR MS MR Dn CPn CPc SDn DCn Qn Dn CPn CPc SDn DCn Qn (t+1) X X X H L H L u L L L L X X X L H L H u L L L H L L u L L L X X X H H U H L u L L H NOTE: X L L L L Qn (t) 1. H = High Voltage Level, L = Low Voltage Level, X = Don t Care, U = X H X L L Qn (t) Undefined, t = Time before CP Positive Transition, t+1 = Time after CP Positive Transition, u = Low-to-High Transition X X H L L Qn (t) NOTE: 1. H = High Voltage Level, L = Low Voltage Level, X = Don t Care, U = Undefined, t = Time before CP Positive Transition, t+1 = Time after CP Positive Transition, u = Low-to-High Transition M9999-060910 2 hbwhelp micrel.com or (408) 955-1690