VN2222 VN2224 N-Channel Enhancement-Mode Vertical DMOS FETs Ordering Information Order Number / Package BV /R I DSS DS(ON) D(ON) BV (max) (min) TO-92 20-Pin C-Dip DGS 220V 1.25 5.0A VN2222NC 240V 1.25 5.0A VN2224N3 High Reliability Devices Advanced DMOS Technology See pages 5-4 and 5-5 for MILITARY STANDARD Process Flows and Ordering Information. These enhancement-mode (normally-off) transistors utilize a vertical DMOS structure and Supertexs well-proven silicon-gate manufacturing process. This combination produces devices with the power handling capabilities of bipolar transistors and with the Features high input impedance and positive temperature coefficient inher- Free from secondary breakdown ent in MOS devices. Characteristic of all MOS structures, these devices are free from thermal runaway and thermally-induced Low power drive requirement secondary breakdown. Ease of paralleling Supertexs vertical DMOS FETs are ideally suited to a wide range Low C and fast switching speeds ISS of switching and amplifying applications where high breakdown Excellent thermal stability voltage, high input impedance, low input capacitance, and fast switching speeds are desired. Integral Source-Drain diode High input impedance and high gain Package Options Applications Motor controls 1 S 20 S Converters 2 S 19 S Amplifiers 3 S 18 NC Switches 4 G1 17 D1 Power supply circuits 5 G2 16 D2 Drivers (relays, hammers, solenoids, lamps, memories, displays, bipolar transistors, etc.) 6 G3 15 D3 7 G4 14 D4 8 S 13 NC 9 S 12 Absolute Maximum Ratings S Drain-to-Source Voltage BV DSS S 10 11 S Drain-to-Gate Voltage BV DGS S G D Gate-to-Source Voltage 20V top view TO-92 20-pin Ceramic DIP Operating and Storage Temperature -55C to +150C Soldering Temperature* 300C Note: See Package Outline section for dimensions. * Distance of 1.6 mm from case for 10 seconds. 11/12/01 Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequateproducts liability indemnification insurance agreement Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the Supertex website: VN2222/VN2224 Thermal Characteristics Package I (continuous)* I (pulsed) Power Dissipation I*I D D jc ja DR DRM T = 25C C/W C/W C TO-92 540mA 5.0A 1.0W 125 170 540mA 5.0A I (continuous) is limited by max rated T . * D j ( 25C unless otherwise specified) Electrical Characteristics Symbol Parameter Min Typ Max Unit Conditions BV Drain-to-Source DSS VN2224 240 VV = 0V, I = 5mA Breakdown Voltage GS D VN2222 220 V Gate Threshold Voltage 1.0 3.0 V V = V , I = 5mA GS(th) GS DS D V Change in V with Temperature -4 -5 mV/CV = V , I = 5mA GS(th) GS(th) GS DS D I Gate Body Leakage 1 100 nA V = 20V, V = 0V GSS GS DS I Zero Gate Voltage Drain Current 50 AV = 0V, V = Max Rating DSS GS DS 5mA V = 0V, V = 0.8 Max Rating GS DS T = 125C A I ON-State Drain Current 2 V = 5V, V = 25V D(ON) A GS DS 510 V = 10V, V = 25V GS DS Static Drain-to-Source R 1.0 1.5 V = 5V, I = 2A DS(ON) GS D ON-State Resistance 0.9 1.25 V = 10V, I = 2A GS D R Change in R with Temperature 1.0 1.4 %/CV = 10V, I = 2A DS(ON) DS(ON) GS D G Forward Transconductance 1.0 2.2 V = 25V, I = 2A FS DS D C Input Capacitance 300 350 ISS V = 0V, V = 25V GS DS C Common Source Output Capacitance 85 150 pF OSS f = 1 MHz C Reverse Transfer Capacitance 20 35 RSS t Turn-ON Delay Time 6 15 d(ON) V = 25V DD t Rise Time 16 25 r ns I = 2A D t Turn-OFF Delay Time 65 90 d(OFF) R = 10 GEN t Fall Time 30 60 f V Diode Forward Voltage Drop 0.8 1.0 V V = 0V, I = 100mA SD GS SD t Reverse Recovery Time 500 ns V = 0V, I = 1A rr GS SD Notes: 1. All D.C. parameters 100% tested at 25C unless otherwise stated. (Pulse test: 300s pulse, 2% duty cycle.) 2. All A.C. parameters sample tested. V DD Switching Waveforms and Test Circuit R 10V L 90% PULSE GENERATOR INPUT OUTPUT 10% 0V R gen t t (ON) (OFF) t t t t d(ON) d(OFF) r F D.U.T. V DD INPUT 10% 10% OUTPUT 0V 90% 90% 2