74HC166PW,118

74HC166 74HCT166 8-bit parallel-in/serial out shift register Rev. 5 9 August 2021 Product data sheet 1. General description The 74HC166 74HCT166 is an 8-bit serial or parallel-in/serial-out shift register. The device features a serial data input (DS), eight parallel data inputs (D0 to D7) and a serial output (Q7). When the parallel enable input (PE) is LOW, the data from D0 to D7 is loaded into the shift register on the next LOW-to-HIGH transition of the clock input (CP). When PE is HIGH, data enters the register serially at DS with each LOW-to-HIGH transition of CP. When the clock enable input (CE) is LOW data is shifted on the LOW-to-HIGH transitions of CP. A HIGH on CE disables the CP input. Inputs include clamp diodes which enable the use of current limiting resistors to interface inputs to voltages in excess of V . CC 2. Features and benefits Wide supply voltage range from 2.0 V to 6.0 V CMOS low power dissipation High noise immunity Latch-up performance exceeds 100 mA per JESD 78 Class II Level B Synchronous parallel-to-serial applications Synchronous serial input for easy expansion Input levels: For 74HC166: CMOS level For 74HCT166: TTL level Complies with JEDEC standards: JESD8C (2.7 V to 3.6 V) JESD7A (2.0 V to 6.0 V) ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V Specified from -40 C to +85 C and from -40 C to +125 C 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74HC166D -40 C to +125 C SO16 plastic small outline package 16 leads body width 3.9 mm SOT109-1 74HCT166D 74HC166PW -40 C to +125 C TSSOP16 plastic thin shrink small outline package 16 leads SOT403-1 body width 4.4 mm 74HCT166PWNexperia 74HC166 74HCT166 8-bit parallel-in/serial out shift register 4. Functional diagram 15 1 SRG8 PE DS 6 7 1 C1/2 2 D0 15 M2 3 D1 9 R 4 D2 5 D3 1 2,1D 10 D4 2 2,1D 11 D5 3 2,1D 12 D6 4 Q7 13 14 D7 5 10 9 MR 11 CP CE 12 14 13 7 6 aaa-008816 aaa-008817 Fig. 1. Logic symbol Fig. 2. IEC logic symbol 2 3 4 5 10 11 12 14 D0 D1 D2 D3 D4 D5 D6 D7 PE 15 DS 1 MR 9 CP 8-BIT PARALLEL/SERIAL-IN/ 7 SERIAL-OUT SHIFT REGISTER CE Q7 6 13 aaa-008818 Fig. 3. Functional diagram 74HC HCT166 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2021. All rights reserved Product data sheet Rev. 5 9 August 2021 2 / 17