NTE834

NTE834 & NTE834SM Integrated Circuit Low Power Low Offset Voltage Comparator Description: The NTE834 and NTE834SM are precision voltage comparators designed to operate from a single power supply over a wide range of voltages. Operation from split power supplies is also possible and the low power supply current drain is independent of the magnitude of the power supply voltage. These comparators also has a unique characteristic in that the input commonmode voltage range includes GND, even though operated from a single power supply voltage. Features: Wide Single Supply Voltage Range: 2V to 36V Very Low Supply Current Drain: 0.8mA Typ Low Input Biasing Current: 25nA Low Offset Voltage: 3mV Low Input Offset Current: 5nA Output Voltage Compatible with TTL, DTL, ECL, MOS, and CMOS Logic Systems Available in Standard 14Lead DIP (NTE834) and Surface Mount SOIC14 (NTE834SM) Applications: Limit Comparators Simple Analog to Digital Converters Pulse, Squarewave, and Time Delay Generators Absolute Maximum Ratings: + Supply Voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36V or 18V Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3V to +36V Power Dissipation (Note 1), P . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 775mW D Derate above +25C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.2mW/C Output ShortCircuit to GND (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous Input Current (V < 0.3V, Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50mA IN Operating Temperature Range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to +70C opr Storage Temperature Range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 to +150C stg Lead Temperature (Soldering, 10 seconds), T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +300C L+ Electrical Characteristics: (V = 5V, 55C T +125C, unless otherwise specified) A Parameter Test Conditions Min Typ Max Unit Input Offset Voltage T = +25C, Note 6 2.0 5.0 mV A Input Bias Current I or I with Output in Linear Range, 25 250 nA IN(+) IN() T = +25C, Note 4 A Input Offset Current I I , T = +25C 5.0 50 nA IN(+) IN() A + Input CommonMode Voltage T = +25C, Note 5 0 V 1.5 V A Range Supply Current R = on all Comparators, T = +25C 0.8 2.0 mA L A + Voltage Gain R 15k , V = 15V (To Support Large 200 V/mV L V Swing), T = +25C O A Large Signal Response Time V = TTL Logic Swing, V = 1.4V, 300 ns IN REF V = 5V, R = 5.1k, T = +25C RL L A Response Time V = 5V, R = 5.1k , T = +25C 1.3 s RL L A Output Sink Current V 1V, V = 0, V 1.5V, 6.0 16 mA IN() IN(+) O T = +25C A Saturation Voltage V 1V, V = 0, I 4mA, 250 400 mV IN() IN(+) SINK T = +25C A Output Leakage Current V 1V, V = 0, V = 5V, 0.1 nA IN(+) IN() O T = +25C A Input Offset Voltage Note 6 9.0 mV DC Input Offset Current I I 150 nA IN(+) IN() Input Bias Current I or I with Output in Linear Range 400 nA IN(+) IN() + Input Common Mode Voltage 0 V 2.0 V Range Saturation Voltage V 1V, V = 0, I 4mA 700 mV IN() IN(+) SINK Output Leakage Current V 1V, V = 0, V = 30V 1.0 A IN(+) IN() O Differential Input Voltage All V s 0V (or V, if used) 36 V IN Note 1 For operating at high temperatures, these devices must be derated based on a +125C maxi- mum junction temperature and a thermal resistance of +175C/W which applies for the device soldered to a printed circuit board, operating in ambient still air. The low bias dissipation and the ONOFF characteristic of the outputs keeps the chip dissipation very low (P 100mW), D provided the output transistors are allowed to saturate. + Note 2 Short circuits from the output to V can cause excessive heating and eventual destruction. + The maximum output current is approximately 20mA independent of the magnitude of V . Note 3 This input current will only exist when the voltage at any of the input leads is driven negative. It is due to the collectorbase junction of the input PNP transistors becoming forward biased and thereby acting as input diode clamps. Note 4 The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent of the state of the output so no loading change exists on the reference to input lines. Note 5 The input commonmode voltage or either input signal voltage should not be allowed to go + negative by more than 0.3V. The upper end of the commonmode voltage range is V 1.5V, but either or both inputs can go to +30V without damage. + Note 6. At output switch point, V 1.4V, R = 0 with V from 5V and over the full input common O S mode range (0V to V+ 1.5V).