2.5 V/3.3 VECL 1:2 Differential Fanout Buffer MC10LVEP11, MC100LVEP11 Description The MC10/100LVEP11 is a differential 1:2 fanout buffer. The www.onsemi.com device is pin and functionally equivalent to the EP11 device. With AC performance the same as the EP11 device, the LVEP11 is ideal for applications requiring lower voltage. Single-ended CLK input 8 8 operation is limited to a V 3.0 V in PECL mode, or V CC EE 1 1 3.0 V in NECL mode. SOIC8NB TSSOP8 The 100 Series contains temperature compensation. DFN8 D SUFFIX DT SUFFIX MN SUFFIX CASE CASE Features CASE 506AA 75107 948R02 240 ps Typical Propagation Delay MARKING DIAGRAMS* Maximum Frequency > 3.0 GHz Typical 8 PECL Mode Operating Range: 8 HVP11 V = 2.375 V to 3.8 V with V = 0 V HU11 CC EE ALYW ALYW NECL Mode Operating Range: V = 0 V with V = 2.375 V to 3.8 V 1 14 CC EE 1 Open Input Default State 8 8 Q Output Will Default LOW with Inputs Open or at V EE KVP11 KU11 ALYW ALYW LVDS Input Compatible These Devices are Pb-Free, Halogen Free and are RoHS Compliant 1 1 H = MC10 L = Wafer Lot K = MC100 Y = Year 4K = MC100 W = Work Week M = Date Code = Pb-Free Package A = Assembly Location (Note: Microdot may be in either location) *For additional marking information, refer to Application Note AND8002/D. ORDERING INFORMATION Device Package Shipping 2500 / MC10LVEP11DR2G SOIC8NB Tape & Reel (Pb-Free) 100 Units / MC10LVEP11DTG TSSOP8 Tube (Pb-Free) 98 Units / MC100LVEP11DG SOIC8NB Tube (Pb-Free) 2500 / MC100LVEP11DR2G SOIC8NB Tape & Reel (Pb-Free) MC100LVEP11DTG 100 Units / TSSOP8 Tube (Pb-Free) MC100LVEP11DTR2G TSSOP8 2500 / (Pb-Free) Tape & Reel MC100LVEP11MNR4G DFN8 1000 / (Pb-Free) Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Semiconductor Components Industries, LLC, 2016 1 Publication Order Number: May, 2021 Rev. 15 MC10LVEP11/D 4K M MC10LVEP11, MC100LVEP11 Table 1. PIN DESCRIPTION PIN FUNCTION Q0 1 8 V CC D*, D** ECL Data Inputs Q0, Q0, Q1, Q1 ECL Data Outputs V Positive Supply CC Q0 2 7 D V Negative Supply EE EP (DFN8 only) Thermal exposed pad must be connected to a sufficient ther- mal conduit. Electrically connect to the most negative supply (GND) or leave Q1 3 6 D unconnected, floating open. *Pins will default to 2/3 V when left open. CC **Pins will default LOW when left open. Q145 V EE Figure 1. 8-Lead Pinout (Top View) and Logic Diagram Table 2. ATTRIBUTES Characteristics Value Internal Input Pulldown Resistor 75 k Internal Input Pullup Resistor 37.5 k ESD Protection Human Body Model > 4 kV Machine Model > 200 V Charged Device Model > 2 kV Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) Pb-Free Pkg SOIC8NB Level 1 TSSOP8 Level 3 DFN8 Level 1 Flammability Rating Oxygen Index: 28 to 34 UL 94 V0 0.125 in Transistor Count 110 Devices Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. For additional information, see Application Note AND8003/D. www.onsemi.com 2