3 Amp V Termination TT Regulator DDR1, DDR2, DDR3, LPDDR3, DDR4 NCP51400, NCV51400 The NCP51400 is a source/sink Double Data Rate (DDR) termination regulator specifically designed for low input voltage and www.onsemi.com lownoise systems where space is a key consideration. The NCP51400 maintains a fast transient response and only requires a minimum output capacitance of 20 F. The NCP51400 supports a remote sensing function and all power requirements for DDR V TT bus termination. The NCP51400 can also be used in lowpower chipsets and graphics processor cores that require dynamically DFN10, 3x3, 0.5P adjustable output voltages. CASE 506CL The NCP51400 is available in the thermallyefficient DFN10 Exposed Pad package, and is rated both Green and Pbfree. MARKING DIAGRAM Features For Automotive Applications 51400 Input Voltage Rails: Supports 2.5 V, 3.3 V and 5 V Rails ALYW PV Voltage Range: 1.1 V to 3.5 V CC Integrated Power MOSFETs 51400 = Specific Device Code Fast LoadTransient Response A = Assembly Location P Logic output pin to Monitor V Regulation L = Wafer Lot (Optional character) GOOD TT Y = Year EN Logic input pin for Shutdown mode W = Work Week V Reference Input Allows for Flexible Input Tracking Either RI = PbFree Package Directly or Through Resistor Divider (Note: Microdot may be in either location) Remote Sensing (V ) TTS Builtin Soft Start, Under Voltage Lockout and Over Current Limit PIN CONNECTION Thermal Shutdown + Small, LowProfile 10pin, 3x3 DFN Package V 1 10 V RI CC NCV51400MWTXG Wettable Flank Option for Enhanced Optical 2 9 PV P CC GOOD Inspection V GND GND 3 8 TT NCV Prefix for Automotive and Other Applications Requiring 4 7 P EN GND Unique Site and Control Change Requirements AECQ100 V 5 6 V TTS RO Qualified and PPAP Capable* Exposed Pad These Devices are PbFree and are RoHS Compliant Applications DDR Memory Termination ORDERING INFORMATION Desktop PCs, Notebooks, and Workstations Device Package Shipping Servers and Networking equipment NCP51400MNTXG Telecom/Datacom, GSM Base Station DFN10 3000 / Tape & NCV51400MNTXG* Graphics Processor Core Supplies (PbFree) Reel NCV51400MWTXG* Set Top Boxes, LCDTV/PDPTV, Copier/Printers For information on tape and reel specifications, Chipset/RAM Supplies as Low as 0.5 V including part orientation and tape sizes, please Active Bus Termination refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Semiconductor Components Industries, LLC, 2016 1 Publication Order Number: June, 2020 Rev. 6 NCP51400/DNCP51400, NCV51400 PIN FUNCTION DESCRIPTION Pin Number Pin Name Pin Function 1 V V External Reference Input ( set to V / 2 thru resistor network ). RI TT DDQ 2 PV Power input. Internally connected to the output source MOSFET. CC 3 V Power Output of the Linear Regulator. TT 4 P Power Ground. Internally connected to the output sink MOSFET. GND 5 V V Sense Input. The V pin provides accurate remote feedback sensing of V . Connect V to the TTS TT TTS TT TTS remote DDR termination bypass capacitors. 6 V Independent Buffered V Reference Output. Sources and sinks over 5 mA. Connect to GND thru RO TT 0.1 F ceramic capacitor. 7 EN Shutdown Control Input. CMOS compatible input. Logic high = enable, logic low = shutdown. Connect to V for normal operation. DDQ 8 GND Common Ground. 9 P Power Good (Open Drain output). GOOD 10 V Analog power supply input. Connect to GND thru a 1 4.7 F ceramic capacitor. CC THERMAL Pad for thermal connection. The exposed pad must be connected to the ground plane using multiple PAD vias for maximum power dissipation performance. ABSOLUTE MAXIMUM RATINGS Rating Symbol Value Unit V , PV , V , V , V , V (Note 1) 0.3 to 6.0 V CC CC TT TTS RI RO EN, P (Note 1) 0.3 to 6.0 V GOOD P to GND (Note 1) 0.3 to +0.3 V GND Storage Temperature T 55 to 150 C STG Operating Junction Temperature Range T 150 C J ESD Capability, Human Body Model (Note 2) ESD 2000 V HBM Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area. 2. This device series incorporates ESD protection and is tested by the following method: ESD Human Body Model tested per AECQ100002 (EIA/JESD22A114) ESD Machine Model tested per AECQ100003 (EIA/JESD22A115) Latchup Current Maximum Rating tested per JEDEC standard: JESD78. DISSIPATION RATINGS Derating Factor above Package T = 25 C Power Rating T = 25 C T = +85 C Power Rating A A A 10Pin DFN 1.92 W 19 mW/C 0.79 W THERMAL INFORMATION NCP51400 (*) DFN 3x3mm Symbol Thermal Metric 10 pins Unit R Junctiontoambient thermal resistance 53.9 C/W JA R Junctiontocase (top) thermal resistance 95.5 C/W JC(top) Junctiontoboard thermal resistance (1mm from package) 32.3 C/W R JB Junctiontotop thermal resistance 4.3 C/W JT Junctiontoboard thermal resistance (1mm from package) 32.3 C/W JB Junctiontocase (bot) thermal resistance 14.2 C/W R JC(bot) *1S2P JEDEC JESD517 PCB with 240 sqmm, 2 oz copper heat spreader. www.onsemi.com 2