DATASHEET ISL32173E, ISL32177E, ISL32273E, ISL32275E, ISL32277E FN7529 Rev.5.02 Quad, 16.5kV ESD Protected, 3.0V to 5.5V, RS-485/RS-422 Receivers Apr 9, 2020 These Renesas devices are 16.5kV IEC61000-4-2 ESD Features protected, 3.0V to 5.5V powered, quad receivers for balanced IEC61000 ESD protection (RS-485 inputs). . . . . . . . 16.5kV communication using the RS-485 and RS-422 standards. Each receiver has low input currents (200A), so it presents a 1/4 - Class 3 ESD on all other pins . . . . . . . . . . . . . . . .>8kV HBM unit load to the RS-485 bus and allows up to 128 receivers on Wide supply range . . . . . . . . . . . . . . . . . . . . . . . . . 3.0V to 5.5V the bus. Wide common-mode range . . . . . . . . . . . . . . . . . -7V to +12V The ISL32173E and ISL32177E are high data rate receivers Low part-to-part propagation delay tolerance (ISL3217xE) that operate at data rates up to 80Mbps. Their 8ns maximum . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8ns (max) propagation delay skew (tolerance) ensures excellent part-to-part matching. The ISL32273E, ISL32275E, and Specified for +125C operation ISL32277E are reduced supply current versions that operate at Fail-safe open Rx inputs data rates up to 20Mbps. 1/4 unit load allows 128 devices on the bus The receiver outputs are tri-statable and incorporate a hot plug Available in industry standard pinouts (ISL32173E) and a feature to keep them disabled during power-up and 4x4 QFN (ISL32x77E) with added features power-down. Versions are available with a common EN/EN (ISL32173E pinout) or a versatile individual channel enable Logic supply pin (V ) eases operation in mixed supply L (see Table 1). systems (ISL32x77E) High data rates. . . . . . . . . . . . . . . . up to 80Mbps or 20Mbps A 26% smaller footprint is available with the ISL32177E and ISL32277E QFN packages and these two devices also feature Low shutdown supply current. . . . . . . . . . . . . . . . . . . . . . 60A a logic supply pin (V ). The V supply sets the switching points L L Tri-statable Rx outputs of the enable inputs and the receiver outputs V , to levels OH 5V tolerant logic inputs when V = 3.3V compatible with a lower supply voltage in mixed voltage CC systems. Individual channel and group enable pins increase Applications the flexibility of the ISL32177E and ISL32277E. Telecom equipment Related Literature Motor controllers/encoders For a full list of related documents, visit our website: Programmable logic controllers ISL32173E, ISL32177E, ISL32273E, ISL32275E, ISL32277E Industrial/process control networks device pages V = 3.3V, +25C CC of DEVICES = 270 V = 3.3V 80Mbps CC 1 0 A - B -1 3.0 V = 2.5V L 2.5 V = 1.8V 2.0 L 1.5 1.0 V = 1.6V L 0.5 0 -0.5 RECEIVER PROPAGATION DELAY (ns) TIME (4ns/DIV) FIGURE 1. ISL32177E PART-TO-PART PROPAGATION DELAY VARIABILITY FIGURE 2. ISL3217xE DATA RATE AND V PERFORMANCE L FN7529 Rev.5.02 Page 1 of 22 Apr 9, 2020 FREQUENCY 9.67 9.80 9.92 10.04 10.17 10.29 10.41 10.54 10.66 10.78 10.91 11.03 11.15 11.28 11.40 11.52 RECEIVER OUTPUT (V) RECEIVER INPUT (V)ISL32173E, ISL32177E, ISL32273E, ISL32275E, ISL32277E Typical Operating Circuits (1 of 4 Channels Shown) 3.3V to 5V 3.3V to 5V 100nF 100nF 16 16 R R PU B R PU V V CC CC EN 12 A 2 2 Y 3 RO DI 1 V R FS T 12 EN B 1 3 Z EN 4 GND EN GND R B 8 4 8 ISL32X73E ISL32X72E FIGURE 3. NETWORK USING GROUP ENABLES 3.3V to 5V 3.3V to 5V 100nF 100nF 16 16 R B R PU V V CC CC EN12 4 A1 2 2 Y1 3 RO1 DI1 1 V R FS T 4 EN12 B1 1 3 Z1 GND GND R B 8 8 ISL32275E ISL32174E FIGURE 4. NETWORK USING PAIRED ENABLES 1.8V 3.3V to 5V 3.3V to 5V 2.5V 100nF 100nF 21 22 21 20 R R PU PU V V V V L CC CC L 9 22 SHDNEN SHDNEN 2, 3, 15, 16 R PU 15 EN1 EN4 - R B EN 14 V CC 4 EN EN EN 4 V CC MCU/ A1 24 24 Y UART 1 RO1 DI 23 MCU/ R V FS T UART 2 EN1 B1 23 1 Z GND GND GND GND R B 10 9 ISL32x77E ISL32179E Using individual channel enable pins and configured for lowest Using active group enable pins and configured for lowest shutdown supply surrent SHDN Supply Current Note: When using separate supplies, Note: When using separate supplies, V must be powered up before V V must be powered up before V CC L CC L FIGURE 5. NETWORK WITH V PIN FOR INTERFACING TO LOWER VOLTAGE LOGIC DEVICES L NOTE: To calculate the resistor values, see TB509. FN7529 Rev.5.02 Page 2 of 22 Apr 9, 2020