W9864G2JH 512K 4 BANKS 32BITS SDRAM Table of Contents- 1. GENERAL DESCRIPTION ......................................................................................................... 3 2. FEATURES ................................................................................................................................. 3 3. ORDER INFORMATION ............................................................................................................. 3 4. PIN CONFIGURATION ............................................................................................................... 4 5. PIN DESCRIPTION ..................................................................................................................... 5 6. BLOCK DIAGRAM ...................................................................................................................... 6 7. FUNCTIONAL DESCRIPTION .................................................................................................... 7 7.1 Power Up and Initialization ............................................................................................. 7 7.2 Programming Mode Register .......................................................................................... 7 7.3 Bank Activate Command ................................................................................................ 7 7.4 Read and Write Access Modes ...................................................................................... 7 7.5 Burst Read Command .................................................................................................... 8 7.6 Burst Command .............................................................................................................. 8 7.7 Read Interrupted by a Read ........................................................................................... 8 7.8 Read Interrupted by a Write ............................................................................................ 8 7.9 Write Interrupted by a Write ............................................................................................ 8 7.10 Write Interrupted by a Read ............................................................................................ 8 7.11 Burst Stop Command ..................................................................................................... 9 7.12 Addressing Sequence of Sequential Mode .................................................................... 9 7.13 Addressing Sequence of Interleave Mode ...................................................................... 9 7.14 Auto-precharge Command ........................................................................................... 10 7.15 Precharge Command .................................................................................................... 10 7.16 Self Refresh Command ................................................................................................ 10 7.17 Power Down Mode........................................................................................................ 11 7.18 No Operation Command ............................................................................................... 11 7.19 Deselect Command ...................................................................................................... 11 7.20 Clock Suspend Mode .................................................................................................... 11 8. OPERATION MODE ................................................................................................................. 12 8.1 Simplified Stated Diagram ............................................................................................ 13 9. ELECTRICAL CHARACTERISTICS ......................................................................................... 14 9.1 Absolute Maximum Ratings .......................................................................................... 14 9.2 Recommended DC Operating Conditions .................................................................... 14 9.3 Capacitance .................................................................................................................. 15 9.4 DC Characteristics ........................................................................................................ 15 9.5 AC Characteristics and Operating Condition ................................................................ 16 10. TIMING WAVEFORMS ............................................................................................................. 18 10.1 Command Input Timing ................................................................................................ 18 10.2 Read Timing .................................................................................................................. 19 10.3 Control Timing of Input/Output Data ............................................................................. 20 10.4 Mode Register Set Cycle .............................................................................................. 21 Publication Release Date: Mar. 13, 2017 Revision: A03 - 1 - W9864G2JH 11. OPERATING TIMING EXAMPLE ............................................................................................. 22 11.1 Interleaved Bank Read (Burst Length = 4, CAS Latency = 3) ...................................... 22 11.2 Interleaved Bank Read (Burst Length = 4, CAS Latency = 3, Auto-precharge) ........... 23 11.3 Interleaved Bank Read (Burst Length = 8, CAS Latency = 3) ...................................... 24 11.4 Interleaved Bank Read (Burst Length = 8, CAS Latency = 3, Auto-precharge) ........... 25 11.5 Interleaved Bank Write (Burst Length = 8) ................................................................... 26 11.6 Interleaved Bank Write (Burst Length = 8, Auto-precharge) ........................................ 27 11.7 Page Mode Read (Burst Length = 4, CAS Latency = 3)............................................... 28 11.8 Page Mode Read/Write (Burst Length = 8, CAS Latency = 3) ..................................... 29 11.9 Auto-precharge Read (Burst Length = 4, CAS Latency = 3) ........................................ 30 11.10 Auto-precharge Write (Burst Length = 4) .................................................................... 31 11.11 Auto Refresh Cycle ..................................................................................................... 32 11.12 Self Refresh Cycle ....................................................................................................... 33 11.13 Bust Read and Single Write (Burst Length = 4, CAS Latency = 3) ............................. 34 11.14 Power Down Mode ...................................................................................................... 35 11.15 Auto-precharge Timing (Write Cycle) .......................................................................... 36 11.16 Auto-precharge Timing (Read Cycle) .......................................................................... 37 11.17 Timing Chart of Read to Write Cycle ........................................................................... 38 11.18 Timing Chart of Write to Read Cycle ........................................................................... 38 11.19 Timing Chart of Burst Stop Cycle (Burst Stop Command) .......................................... 39 11.20 Timing Chart of Burst Stop Cycle (Precharge Command) .......................................... 39 11.21 CKE/DQM Input Timing (Write Cycle) ......................................................................... 40 11.22 CKE/DQM Input Timing (Read Cycle) ......................................................................... 41 11.23 Power Up and Initialization .......................................................................................... 42 12. PACKAGE SPECIFICATION .................................................................................................... 43 13. REVISION HISTORY ................................................................................................................ 44 Publication Release Date: Mar. 13, 2017 Revision: A03 - 2 -