2 LC MOS LOGDAC a Logarithmic D/A Converter AD7111/AD7111A FEATURES FUNCTIONAL BLOCK DIAGRAMS Dynamic Range: 88.5 dB V V DD IN Resolution: 0.375 dB On-Chip Data Latches R FB +5 V Operation AD7111 I OUT AD7111A Pin Compatible with AD7524 17-BIT DAC Low Power AGND APPLICATIONS Audio Attenuators 17-BIT LATCH Sonar Systems Function Generators DECODE LOGIC Digitally Controlled AGC System 8-BIT BUFFER CONTROL LOGIC GENERAL DESCRIPTION The LOGDAC AD7111/AD7111A are monolithic multiplying D/A converters featuring wide dynamic range in a small pack- D0 D7 DGND CS WR age. Both DACs can attenuate an analog input signal over the range 0 dB to 88.5 dB in 0.375 dB steps. They are available in V V DD IN 16-pin DIPs and SOIC packages. The AD7111 is also available in a 20-terminal LCCC package. R FB The degree of attenuation across the DAC is determined by an AD7111A I OUT 8-bit word applied to the onboard decode logic. This 8-bit word 17-BIT DAC AGND is decoded into a 17-bit word which is then applied to a 17-bit R-2R ladder. The very fine step resolution, which is available over the entire dynamic range, is due to the use of this 17-bit 17-BIT LATCH DAC. The AD7111/AD7111A are easily interfaced to a standard 8-bit DECODE LOGIC MPU bus via an 8-bit data port and standard microprocessor control lines. The AD7111 WR input is edge triggered and re- quires a rising edge to load new data to the DAC. The AD7111A 8-BIT BUFFER CONTROL LOGIC WR is level triggered to allow transparent operation of the latches, if required. It should also be noted that the AD7111A is exactly pin and function-compatible with the AD7524, an in- D0 D7 DGND CS WR dustry standard 8-bit multiplying DAC. This allows an easy up- grading of existing AD7524 designs which would benefit both PRODUCT HIGHLIGHTS from the wider dynamic range and the finer step resolution of- 1. Wide Dynamic Range: 0 dB to 88.5 dB attenuation range in fered by the AD7111A. 0.375 dB steps. The AD7111/AD7111A are fabricated in Linear Compatible 2. Small Package: The AD7111/AD7111A are available in 2 CMOS (LC MOS), an advanced, mixed technology process that 16-pin DIPs and SOIC packages. combines precision bipolar circuits with low power CMOS logic. 3. Transparent Latch Operation: By tying the CS and WR in- LOGDAC is a registered trademark of Analog Devices, Inc. puts low, the DAC latches in the AD7111A can be made transparent. 4. Fast Microprocessor Interface: Data setup times of 25 ns and write pulse width of 57 ns make the AD7111A compatible with modern microprocessors. REV. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 617/329-4700 Fax: 617/326-8703AD7111/AD7111ASPECIFICATIONS (V = +5 V, V = 10 V dc, I = AGND = DGND = O V output amplifier DD IN OUT AD7111ELECTRICAL CHARACTERISTICS AD711 except where noted) AD7111L/C/U Grades AD7111K/B/T Grades Parameter T = +258CT = T , T T = +258CT = T , T Units Conditions/Comments A A MIN MAX A A MIN MAX NOMINAL RESOLUTION 0.375 0.375 0.375 0.375 dB ACCURACY RELATIVE TO 0 dB ATTENUATION 0.375 dB Steps: Accuracy 0.17 dB 0 to 36 0 to 36 0 to 30 0 to 30 dB min Guaranteed Attenuation Ranges Monotonic 0 to 54 0 to 54 0 to 48 0 to 48 dB min for Specified Step Sizes 0.75 dB Steps: Accuracy 0.35 dB 0 to 48 0 to 42 0 to 42 0 to 36 dB min Monotonic 0 to 72 0 to 66 0 to 72 0 to 60 dB min 1.5 dB Steps: Accuracy 0.7 dB 0 to 54 0 to 48 0 to 42 0 to 42 dB min Full Range Is from 0 dB Monotonic Full Range 0 to 78 0 to 85.5 0 to 72 dB min to 88.5 dB 3.0 dB Steps: Accuracy 1.4 dB 0 to 66 0 to 54 0 to 60 0 to 48 dB min Monotonic Full Range Full Range Full Range Full Range dB min 6.0 dB Steps: Accuracy 2.7 dB 0 to 72 0 to 60 0 to 60 0 to 48 dB min Monotonic Full Range Full Range Full Range Full Range dB min GAIN ERROR 0.1 0.15 0.15 0.20 dB max V INPUT RESISTANCE 9/11/15 9/11/15 7/11/18 7/11/18 k min/typ/max IN R INPUT RESISTANCE 9.3/11.5/15.7 9.3/11.5/15.7 7.3/11.5/18.8 7.3/11.5/18.8 k min/typ/max FB DIGITAL INPUTS V (Input High Voltage) 2.4 2.4 2.4 2.4 V min IH V (Input Low Voltage) 0.8 0.8 0.8 0.8 V max IL Input Leakage Current 1 10 1 10 A max Digital Inputs = V DD 1 SWITCHING CHARACTERISTICS t 0 0 0 0 ns min Chip Select to Write Setup Time CS t 0 0 0 0 ns min Chip Select to Write Hold Time CH t 350 500 350 500 ns min Write Pulse Width WR t 175 250 175 250 ns min Data Valid to Write Setup Time DS t 10 10 10 10 ns min Data Valid to Write Hold Time DH t 3 4.5 3 4.5 s min Refresh Time RFSH POWER SUPPLY V +5 +5 +5 +5 V DD I 1 4 1 4 mA max Digital Inputs = V or V DD IL IH 500 1000 500 1000 A max Digital Inputs = 0 V or V DD See Figure 6 NOTE 1 Sample tested at +25C to ensure compliance. Specifications subject to change without notice. These characteristics are included for design guidance only and are not subject AC PERFORMANCE CHARACTERISTICS to test. V = +5 V, V = 10 V dc except where noted, I = AGND = DGND = O V, output amplifier AD711 except where noted. DD IN OUT AD7111L/C/U Grades AD7111K/B/T Grades Parameter T = +258CT = T , T T = +258CT = T , T Units Conditions/Comments A A MIN MAX A A MIN MAX DC Supply Rejection, Gain/V 0.001 0.005 0.001 0.005 dB per % max V = 10%, Input Code = 00000000 DD DD Propagation Delay 3.0 4.5 3.0 4.5 s max Full-Scale Change Measured from WR Going High, CS = 0 V Digital-to-Analog Glitch Impulse 100 100 nV secs typ Measured with AD843 as Output Amplifier for Code Transition 10000000 to 00000000 C1 of Figure 1 is 0 pF Output Capacitance, Pin 1 185 185 185 185 pF max Input Capacitance, Pin 15 and Pin 16 7 7 7 7 pF max Feedthrough at 1 kHz 94 72 94 68 dB max Total Harmonic Distortion 91 91 91 91 dB typ V = 6 V rms at 1 kHz IN Output Noise Voltage Density 70 70 70 70 nV/Hz max Includes AD711 Amplifier Noise Digital Input Capacitance 7 7 7 7 pF max Specifications subject to change without notice. 2 REV. 0