AD7869JRZ

2 LC MOS a Complete, 14-Bit Analog I/O System AD7869 FEATURES FUNCTIONAL BLOCK DIAGRAM Complete 14-Bit l/O System, Comprising V DD 14-Bit ADC with Track/Hold Amplifier 83 kHz Throughput Rate RI DAC 14-Bit DAC with Output Amplifier R R 3.5 ms Settling Time On-Chip Voltage Reference Operates from 65 V Supplies V OUT 14 - BIT Low Power130 mW typ DAC LDAC Small 0.3 Wide DIP TFS DAC DAC 3V APPLICATIONS RO DAC TCLK SERIAL REFERENCE Digital Signal Processing DT INTERFACE ADC 3V CONTROL Speech Recognition and Synthesis REFERENCE RFS Spectrum Analysis ADC SERIAL RCLK RO ADC High Speed Modems INTERFACE DR DSP Servo Control R CLK CLOCK R 14 - BIT V IN ADC CONVST GENERAL DESCRIPTION AD7869 TRACK/HOLD The AD7869 is a complete 14-bit I/O system containing a DAC DGND V AGND SS and an ADC. The ADC is a successive approximation type with a track-and-hold amplifier, having a combined throughput rate of 83 kHz. The DAC has an output buffer amplifier with a set- PRODUCT HIGHLIGHTS tling time of 4 s to 14 bits. Temperature compensated 3 V bur- 1. Complete 14-Bit I/O System. ied Zener references provide precision references for the DAC The AD7869 contains a 14-bit ADC with a track-and-hold and ADC. amplifier and a 14-bit DAC with output amplifier. Also in cluded are separate on-chip voltage references for the DAC Interfacing to both the DAC and ADC is serial, minimizing pin and the ADC. count and giving a small 24-pin package size. Standard control signals allow serial interfacing to most DSP machines. 2. Dynamic Specifications for DSP Users. In addition to traditional dc specifications, the AD7869 is Asynchronous ADC conversion control and DAC updating is specified for ac parameters, including signal-to-noise ratio made possible with the CONVST and LDAC logic inputs. and harmonic distortion. These parameters, along with im- The AD7869 operates from 5 V power supplies the analog in- portant timing parameters, are tested on every device. put/output range of the ADC/DAC is 3 V. The part is fully 3. Small Package. specified for dynamic parameters such as signal-to-noise ratio The AD7869 is available in a 24-pin DIP and a 28-pin SOIC and harmonic distortion as well as traditional dc specifications. package. The part is available in a 24-pin, 0.3 inch wide, plastic or her- metic dual-in-line package (DIP) and in a 28-pin, plastic SOIC package. REV. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. use, nor for any infringements of patents or other rights of third parties World Wide Web Site: AD7869SPECIFICATIONS (V = +5 V 6 5%, V = 5 V 6 5%, AGND = DGND = 0 V, f = 2.0 MHz external. DD SS CLK ADC SECTION All specifications T to T unless otherwise noted.) MIN MAX 1 1 Parameter J Version A Version Units Test Conditions/Comments 2 DYNAMIC PERFORMANCE 3, 4 Signal-to-Noise Ratio (SNR) +25C 78 78 dB min V = 10 kHz Sine Wave, f = 83 kHz IN SAMPLE T to T 78 77 dB min MIN MAX Total Harmonic Distortion (THD) 86 86 dB typ V = 10 kHz Sine Wave, f = 83 kHz IN SAMPLE Peak Harmonic or Spurious Noise 86 86 dB typ V = 10 kHz Sine Wave, f = 83 kHz IN SAMPLE Intermodulation Distortion (IMD) Second Order Terms 86 86 dB typ fa = 9 kHz, fb = 9.5 kHz, f = 50 kHz SAMPLE Third Order Terms 88 88 dB typ fa = 9 kHz, fb = 9.5 kHz, f = 50 kHz SAMPLE Track/Hold Acquisition Time 2 2 s max DC ACCURACY Resolution 14 14 Bits Minimum Resolution 14 14 Bits No Missing Codes Are Guaranteed Integral Nonlinearity 2 2 LSB max Differential Nonlinearity 1 1 LSB max Bipolar Zero Error 20 20 LSB max 5 Positive Gain Error 20 20 LSB max 5 Negative Gain Error 20 20 LSB max ANALOG INPUT Input Voltage Range 3 3 Volts Input Current 1 1 mA max 6 REFERENCE OUTPUT RO ADC +25C 2.99/3.01 2.99/3.01 V min/ V max RO ADC TC 25 25 ppm/C typ 40 ppm/C max Reference Load Sensitivity (RO ADC vs. I) 1.5 1.5 mV max Reference Load Current Change (0500 A), Reference Load Should Not Be Changed During Conversion LOGIC INPUTS (CONVST, CLK, CONTROL) Input High Voltage, V 2.4 2.4 V min V = 5 V 5% INH DD Input Low Voltage, V 0.8 0.8 V max V = 5 V 5% INL DD Input Current, I 10 10 A max V = 0 V to V IN IN DD 7 Input Current (CONTROL & CLK) 10 10 A max V = V to DGND IN SS 8 Input Capacitance, C 10 10 pF max IN LOGIC OUTPUTS DR, RFS Outputs Output Low Voltage, V 0.4 0.4 V max I = 1.6 mA, Pull-Up Resistor = 4.7 k OL SINK RCLK Output Output Low Voltage, V 0.4 0.4 V max I = 2.6 mA, Pull-Up Resistor = 2 k OL SINK DR, RFS, RCLK Outputs Floating-State Leakage Current 10 10 A max 8 Floating-State Output Capacitance 15 15 pF max CONVERSION TIME External Clock 10 10 s max Internal Clock 10 10 s max The Internal Clock Has a Nominal Value of 2.0 MHz POWER REQUIREMENTS For Both DAC and ADC V +5 +5 V nom 5% for Specified Performance DD V 5 5 V nom 5% for Specified Performance SS I 22 22 mA max Cumulative Current from the Two V Pins DD DD I 12 12 mA max Cumulative Current from the Two V Pins SS SS Total Power Dissipation 170 170 mW max Typically 130 mW NOTES 1 Temperature ranges are as follows: J Version, 0C to +70C A Version, 40C to +85C. 2 V = 3 V. IN 3 SNR calculation includes distortion and noise components. 4 SNR degradation due to asynchronous DAC updating during conversion is 0.1 dB typ. 5 Measured with respect to internal reference. 6 For capacitive loads greater than 50 pF, a series resistor is required (see Internal Reference section). 7 Tying the CONTROL input to V places the device in a factory test mode where normal operation is not exhibited. DD 8 Sample tested +25C to ensure compliance. Specifications subject to change without notice. 2 REV. B