2 LC MOS 4-Channel, 12-Bit Simultaneous a Sampling Data Acquisition System AD7874 FEATURES FUNCTIONAL BLOCK DIAGRAM Four On-Chip Track/Hold Amplifiers Simultaneous Sampling of 4 Channels V V INT CS RD CONVST DD DD Fast 12-Bit ADC with 8 ms Conversion Time/Channel 29 kHz Sample Rate for All Four Channels INTERNAL CONTROL LOGIC CLK On-Chip Reference CLOCK TRACK/ V 610 V Input Range IN1 HOLD 1 65 V Supplies TRACK/ V COMP IN2 HOLD 2 APPLICATIONS MUX SAR Sonar TRACK/ V IN3 Motor Controllers HOLD 3 DATA DB0 Adaptive Filters REGISTERS DB11 TRACK/ Digital Signal Processing V IN4 HOLD 4 REFERENCE BUFFER 12-BIT DAC REF IN AD7874 GENERAL DESCRIPTION 3V REF OUT The AD7874 is a four-channel simultaneous sampling, 12-bit REFERENCE data acquisition system. The part contains a high speed 12-bit ADC, on-chip reference, on-chip clock and four track/hold am- AGND DGND V SS plifiers. This latter feature allows the four input channels to be sampled simultaneously, thus preserving the relative phase PRODUCT HIGHLIGHTS information of the four input channels, which is not possible if 1. Simultaneous Sampling of Four Input Channels. all four channels share a single track/hold amplifier. This makes Four input channels, each with its own track/hold amplifier, the AD7874 ideal for applications such as phased-array sonar allow simultaneous sampling of input signals. Track/hold ac- and ac motor controllers where the relative phase information is quisition time is 2 s, and the conversion time per channel is important. 8 s, allowing 29 kHz sample rate for all four channels. The aperture delay of the four track/hold amplifiers is small and 2. Tight Aperture Delay Matching. specified with minimum and maximum limits. This allows sev- The aperture delay for each channel is small and the aperture eral AD7874s to sample multiple input channels simultaneously delay matching between the four channels is less than 4 ns. without incurring phase errors between signals connected to Additionally, the aperture delay specification has upper and several devices. A reference output/reference input facility also lower limits allowing multiple AD7874s to sample more than allows several AD7874s to be driven from the same reference four channels. source. 3. Fast Microprocessor Interface. In addition to the traditional dc accuracy specifications such as The high speed digital interface of the AD7874 allows direct linearity, full-scale and offset errors, the AD7874 is also fully connection to all modern 16-bit microprocessors and digital specified for dynamic performance parameters including distor- signal processors. tion and signal-to-noise ratio. The AD7874 is fabricated in Analog Devices Linear Compat- 2 ible CMOS (LC MOS) process, a mixed technology process that combines precision bipolar circuits with low-power CMOS logic. The part is available in a 28-pin, 0.6 wide, plastic or her- metic dual-in-line package (DIP), in a 28-terminal leadless ce- ramic chip carrier (LCCC) and in a 28-pin SOIC. REV. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 617/329-4700 Fax: 617/326-8703(V = +5 V, V = 5 V, AGND = DGND = 0 V, REF IN = +3 V, f = 2.5 MHz DD SS CLK external. All specifications T to T unless otherwise noted.) AD7874SPECIFICATIONS MIN MAX Parameter A Version B Version S Version Units Test Conditions/Comments SAMPLE-AND-HOLD 2 Acquisition Time to 0.01% 2 2 2 s max 2, 3 Droop Rate 1 1 2 mV/ms max 3 3 dB Small Signal Bandwidth 500 500 500 kHz typ V = 500 mV p-p IN 2 Aperture Delay 0 0 0 ns min 40 40 40 ns max 2, 3 Aperture Jitter 200 200 200 ps typ 2 Aperture Delay Matching 4 4 4 ns max SAMPLE-AND-HOLD AND ADC DYNAMIC PERFORMANCE Signal-to-Noise Ratio 70 71 70 dB min f = 10 kHz Sine Wave, f = 29 kHz IN SAMPLE Total Harmonic Distortion 78 80 78 dB max f = 10 kHz Sine Wave, f = 29 kHz IN SAMPLE Peak Harmonic or Spurious Noise 78 80 78 dB max f = 10 kHz Sine Wave, f = 29 kHz IN SAMPLE Intermodulation Distortion fa = 9 kHz, fb = 9.5 kHz, f = 29 kHz SAMPLE 2nd Order Terms 80 80 80 dB max 3rd Order Terms 80 80 80 dB max 2 Channel-to-Channel Isolation 80 80 80 dB max DC ACCURACY Resolution 12 12 12 Bits Relative Accuracy 1 1/2 1 LSB max Differential Nonlinearity 1 1 1 LSB max No Missing Codes Guaranteed 4 Positive Full-Scale Error 5 5 5 LSB max Any Channel 4 Negative Full-Scale Error 5 5 5 LSB max Any Channel Full-Scale Error Match 5 5 5 LSB max Between Channels Bipolar Zero Error 5 5 5 LSB max Any Channel Bipolar Zero Error Match 4 4 4 LSB max Between Channels ANALOG INPUTS Input Voltage Range 10 10 10 Volts Input Current 600 600 600 A max REFERENCE OUTPUTS REF OUT 333V nom REF OUT Error +25C 0.33 0.33 0.33 % max T to T 1 1 1 % max MIN MAX REF OUT Temperature Coefficient 35 35 35 ppm/C typ Reference Load Change 1 1 2 mV max Reference Load Current Change (0500 A) Reference Load Should Not Be Changed During Conversion REFERENCE INPUT Input Voltage Range 2.85/3.15 2.85/3.15 2.85/3.15 V min/V max 3 V 5% Input Current 1 1 1 A max 3 Input Capacitance 10 10 10 pF max LOGIC INPUTS Input High Voltage, V 2.4 2.4 2.4 V min V = 5 V 5% INH DD Input Low Voltage, V 0.8 0.8 0.8 V max V = 5 V 5% INL DD Input Current, I 10 10 10 A max V = 0 V to V IN IN DD 3 Input Capacitance, C 10 10 10 pF max IN LOGIC OUTPUTS Output High Voltage, V 4.0 4.0 4.0 V min V = 5 V 5% I = 40 A OH DD SOURCE Output Low Voltage, V 0.4 0.4 0.4 V max V = 5 V 5% I = 16 mA OL DD SINK DB0DB11 Floating-State Leakage Current 10 10 10 A max V = 0 V to V IN DD Floating-State Output Capacitance 10 10 10 pF max Output Coding 2s COMPLEMENT POWER REQUIREMENTS V +5 +5 +5 V nom 5% for Specified Performance DD V 5 5 5 V nom 5% for Specified Performance SS I 18 18 18 mA max CS = RD = CONVST = +5 V Typically 12 mA DD I 12 12 12 mA max CS = RD = CONVST = +5 V Typically 8 mA SS Power Dissipation 150 150 150 mW max CS = RD = CONVST = +5 V Typically 100 mW NOTES 1 Temperature ranges are as follows: A, B Versions: 40C to +85C S Version: 55C to +125C. 2 See Terminology. 3 Sample tested +25C to ensure compliance. 4 Measured with respect to the REF IN voltage and includes bipolar offset error. 5 For capacitive loads greater than 50 pF a series resistor is required. Specifications subject to change without notice. 2 REV. C