Complete 14-Bit 30 MSPS a CCD Signal Processor AD9824 PRODUCT DESCRIPTION FEATURES The AD9824 is a complete analog signal processor for CCD 14-Bit 30 MSPS A/D Converter applications. It features a 30 MHz single-channel architecture 30 MSPS Correlated Double Sampler (CDS) designed to sample and condition the outputs of interlaced and 4 dB 6 dB 6-Bit Pixel Gain Amplier (PxGA ) progressive scan area CCD arrays. The AD9824s signal chain 2 dB to 36 dB 10-Bit Variable Gain Amplier (VGA) consists of an input clamp, a correlated double sampler (CDS), Low Noise Clamp Circuits PxGA, a digitally controlled VGA, a black level clamp, and a Analog Preblanking Function 14-bit A/D converter. Additional input modes are also pro- Auxiliary Inputs with VGA and Input Clamp vided for processing analog video signals. 3-Wire Serial Digital Interface 3 V Single-Supply Operation The internal registers are programmed through a 3-wire Low Power: 153 mW 3 V Supply serial digital interface. Programmable features include gain Space-Saving 48-Lead LFCSP Package adjustment, black level adjustment, input conguration, and power-down modes. APPLICATIONS High Performance Digital Still Cameras The AD9824 operates from a single 3 V power supply, typically Industrial/Scientific Imaging dissipates 153 mW, and is packaged in a 48-lead LFCSP. FUNCTIONAL BLOCK DIAGRAM AVDD AVSS HD VD VRT VRB PBLK DRVDD COLOR BAND GAP STEERING REFERENCE 4dB 6dB DRVSS 2dB~36dB CCDIN CDS PxGA 2:1 14 ADC DOUT VGA MUX CLP 6 CLP CLPDM 10 AUX1IN CLPOB 2:1 BUF MUX AUX2IN BLK CLAMP 8 LEVEL CONTROL REGISTERS CLP DVDD DIGITAL INTERNAL DVSS INTERFACE TIMING AD9824 SL SCK SDATA SHP SHD DATACLK PxGA is a registered trademark of Analog Devices, Inc. REV. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. use, nor for any infringements of patents or other rights of third parties that Tel: 781/329-4700 www.analog.com may result from its use. No license is granted by implication or otherwise Fax: 781/326-8703 Analog Devices, Inc., 2002 - 2020 under any patent or patent rights of Analog Devices.AD9824SPECIFICATIONS (T to T , AVDD = DVDD = 3.0 V, f = 30 MHz, unless otherwise noted.) GENERAL SPECIFICATIONS MIN MAX DATACLK Parameter Min Typ Max Unit TEMPERATURE RANGE Operating 20 +85 C Storage 65 +150 C POWER SUPPLY VOLTAGE Analog, Digital, Digital Driver 2.7 3.6 V POWER CONSUMPTION Normal Operation (Specied Under Each Mode of Operation) Power-Down Modes Standby 5 mW Total Power-Down 0.5 mW MAXIMUM CLOCK RATE 30 MHz A/D CONVERTER Resolution 14 Bits Differential Nonlinearity (DNL) 0.5 1.0 LSB No Missing Codes 14 Bits Guaranteed Full-Scale Input Voltage 2.0 V Data Output Coding Straight Binary VOLTAGE REFERENCE Reference Top Voltage (VRT) 2.0 V Reference Bottom Voltage (VRB) 1.0 V Specications subject to change without notice. DIGITAL SPECIFICATIONS (DRVDD = 2.7 V, C = 20 pF, unless otherwise noted.) L Parameter Symbol Min Typ Max Unit LOGIC INPUTS High Level Input Voltage V 2.1 V IH Low Level Input Voltage V 0.6 V IL High Level Input Current I 10 A IH Low Level Input Current I 10 A IL Input Capacitance C 10 pF IN LOGIC OUTPUTS High Level Output Voltage, I = 2 mA V 2.2 V OH OH Low Level Output Voltage, I = 2 mA V 0.5 V OL OL Specications subject to change without notice. 2 REV. A