Dual-Channel, 14-Bit CCD Signal Processor with V-Driver and Precision Timing Generator Data Sheet AD9928 FEATURES GENERAL DESCRIPTION 60 MHz grade available (AD9928BBCZ-60) The AD9928 is a highly integrated CCD signal processor for Registers similar to AD9920A and AD9990 digital still-image camera applications. It includes a dual analog Timing generator with 18-channel V-driver front end with analog-to-digital conversion, combined with a full- Serial data output with reduced range LVDS interface function, programmable timing generator and an 18-channel 1.8 V dual AFE core vertical driver (V-driver) for a 2-channel output CCD. The timing Internal LDO regulators for compatibility with 3 V systems generator is capable of supporting up to 24 vertical clock signals Correlated double sampler (CDS) with 3 dB, 0 dB, +3 dB, internally, and the on-chip V-driver supports up to 18 high voltage and +6 dB gain outputs. A Precision Timing core allows adjustment of high speed 6 dB to 42 dB, 10-bit variable gain amplifier (VGA) clocks with approximately 390 ps resolution at 40 MHz operation. 14-bit, 40 MHz analog-to-digital converter (ADC) The AD9928 also contains seven general-purpose outputs, which Black level clamp with variable level control can be used for shutter and system functions. Precision Timing core with ~390 ps resolution at 40 MHz Each analog front end includes black level clamping, CDS, On-chip 3 V horizontal and RG drivers VGA, and a 14-bit ADC. The timing generator provides all the General-purpose outputs (GPOs) for shutter support necessary CCD clocks: RG, H-clocks, V-clocks, sensor gate On-chip driver for external crystal pulses, substrate clock, and substrate bias control. 128-ball CSP BGA package, 9 mm 9 mm, 0.65 mm pitch The AD9928 is specified over an operating temperature range APPLICATIONS of 25C to +85C. High speed digital imaging Surveillance cameras Industrial cameras FUNCTIONAL BLOCK DIAGRAM REFT A REFB A REFT B REFB B AD9928 3dB, 0dB, +3dB, +6dB VREF A VREF B 14 TCLKP 14-BIT CDS VGA CCDIN A ADC TCLKN DOUT0P A 6dB TO 42dB DOUT0N A CLAMP 3dB, 0dB, +3dB, +6dB REDUCED DOUT1P A RANGE 14 LVDS DOUT1N A 14-BIT OUTPUTS CCDIN B CDS VGA ADC DOUT0P B DOUT0N B +3V LDOIN A 6dB TO 42dB LDO DOUT1P B CLAMP +1.8V REG A LDOOUT A DOUT1N B +3V LDOIN B LDO +1.8V INTERNAL CLOCKS REG B LDOOUT B RG A, RG B 2 PRECISION HL A, HL B HORIZONTAL TIMING SL DRIVERS 8 GENERATOR INTERNAL H1A TO H4A, H1B TO H4B SCK REGISTERS XV1 TO XV24 SDATA 18 24 V1A TO V15 VERTICAL SYNC VERTICAL TIMING GENERATOR DRIVER CONTROL XSUBCK SUBCK 7 XSUBCNT (GPO8) GPO1 TO GPO7 HD VD SYNC CLI CLO RST Figure 1. For more information on the AD9928, email Analog Devices, Inc., at afe.ccd analog.com. Rev. SpH Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20092013 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com 08261-001AD9928 Data Sheet NOTES 20092013 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D08261F-0-1/13(SpH) Rev. SpH Page 2 of 2