X-On Electronics has gained recognition as a prominent supplier of ADN4670BSTZ lvds interface ic across the USA, India, Europe, Australia, and various other global locations. ADN4670BSTZ lvds interface ic are a product manufactured by Analog Devices. We provide cost-effective solutions for lvds interface ic, ensuring timely deliveries around the world.

ADN4670BSTZ Analog Devices

ADN4670BSTZ electronic component of Analog Devices
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Part No.ADN4670BSTZ
Manufacturer: Analog Devices
Category:LVDS Interface IC
Description: LVDS Interface IC 1:10 LVDS CLOCK DRIVER IC.
Datasheet: ADN4670BSTZ Datasheet (PDF)
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

1: USD 16.065 ea
Line Total: USD 16.07

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MOQ: 1  Multiples: 1
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Ships to you between Mon. 10 Jun to Wed. 12 Jun

MOQ : 1
Multiples : 1
1 : USD 16.065
10 : USD 14.222
25 : USD 13.637
100 : USD 11.55
250 : USD 10.975
500 : USD 10.275
1000 : USD 10.025

     
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Programmable Low Voltage 1:10 LVDS Clock Driver Data Sheet ADN4670 FEATURES FUNCTIONAL BLOCK DIAGRAM Low output skew <30 ps (typical) CK Distributes one differential clock input to 10 LVDS clock SI 11-BIT SHIFT REGISTER outputs EN Programmableone of two differential clock inputs can be selected (CLK0, CLK1) and individual differential clock 11-BIT CONTROL REGISTER 12-BIT COUNTER 10 9 8 7 6 5 4 3 2 1 0 outputs enabled/disabled MUX Signaling rate up to 1.1 GHz (typical) 1 Q9 2.375 V to 2.625 V power supply range Q9 100 mV differential input threshold 0 Q8 Input common-mode range from rail-to-rail Q8 CLK0 0 I/O pins fail-safe during power-down: V = 0 V CLK0 DD Q7 Available in 32-lead LFCSP and LQFP packages CLK1 Q7 1 CLK1 Industrial operating temperature range: 40C to +85C MUX Q6 Q6 APPLICATIONS Q5 Q5 Clock distribution networks Q4 Q4 Q3 Q3 Q2 Q2 Q1 Q1 Q0 Q0 Figure 1. GENERAL DESCRIPTION The ADN4670 is a low voltage differential signaling (LVDS) first 10 bits determine which outputs are enabled (0 = disabled, th clock driver that expands a differential clock input signal to 1 = enabled), while the 11 bit selects the clock input (0 = th 10 differential clock outputs. The device is programmable CLK0, 1 = CLK1). A 12 clock pulse transfers data from the using a simple serial interface, so that one of two clock inputs shift register to the control register. CLK0 CLK1 can be selected (CLK0/ or CLK1/ ) and any of the The ADN4670 is fully specified over the industrial temperature Q0 Q9 differential outputs (Q0/ to Q9/ ) can be enabled or range and is available in a 32-lead LFCSP and LQFP packages. disabled (tristated). The ADN4670 is designed for use in 50 transmission line environments. When the enable input EN is high, the device may be pro- grammed by clocking 11 data bits into the shift register. The Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Fax: 781.461.3113 20102012 Analog Devices, Inc. All rights reserved. 08870-001ADN4670 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Absolute Maximum Ratings ............................................................6 Applications ....................................................................................... 1 ESD Caution...................................................................................6 Functional Block Diagram .............................................................. 1 Pin Configuration and Function Descriptions ..............................7 General Description ......................................................................... 1 Theory of Operation .........................................................................8 Revision History ............................................................................... 2 LVDS Reciever Input Termination .............................................8 Specifications ..................................................................................... 3 Fail-Safe Operation .......................................................................8 Jitter Characteristics ..................................................................... 3 Programming .................................................................................8 LVDS Switching Characteristics ................................................. 4 Outline Dimensions ..........................................................................9 Programming Logic AC Characteristics ................................... 5 Ordering Guide .............................................................................9 REVISION HISTORY 1/12Rev. 0 to Rev. A Added LQFP Package .................................................... Throughout Updated Outline Dimensions ......................................................... 9 Changes to Ordering Guide ............................................................ 9 4/10Revision 0: Initial Version Rev. A Page 2 of 12

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8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
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