ADP5052ACPZ-R7

5-Channel Integrated Power Solution with Quad Buck Regulators and 200 mA LDO Regulator Data Sheet ADP5052 FEATURES TYPICAL APPLICATION CIRCUIT ADP5052 Wide input voltage range: 4.5 V to 15 V SYNC/MODE VREG INT VREG 1.5% output accuracy over full temperature range VDD OSCILLATOR RT C1 100mA C0 250 kHz to 1.4 MHz adjustable switching frequency FB1 PVIN1 4.5V TO 15V BST1 Adjustable/fixed output options via factory fuse SW1 C3 CHANNEL 1 L1 VOUT1 C2 Power regulation BUCK REGULATOR COMP1 (1.2A/2.5A/4A) VREG C4 Channel 1 and Channel 2: programmable 1.2 A/2.5 A/4 A EN1 Q1 DL1 sync buck regulators with low-side FET driver SS12 R ILIM1 PGND Channel 3 and Channel 4: 1.2 A sync buck regulators R ILIM2 DL2 Channel 5: 200 mA low dropout (LDO) regulator Q2 PVIN2 C5 VREG CHANNEL 2 VOUT2 SW2 Always alive 5.1 V LDO supply for tiny load demand BUCK REGULATOR COMP2 L2 (1.2A/2.5A/4A) C6 C7 BST2 Single 8 A output (Channel 1 and Channel 2 operated EN2 FB2 in parallel) PWRGD PVIN3 BST3 Precision enable with 0.8 V accurate threshold C9 L3 C8 VOUT3 Active output discharge switch SW3 COMP3 CHANNEL 3 BUCK REGULATOR C10 FB3 FPWM or automatic PWM/PSM mode selection (1.2A) EN3 PGND3 Frequency synchronization input or output SS34 BST4 Optional latch-off protection on OVP/OCP failure PVIN4 C12 L4 VOUT4 Power-good flag on selected channels SW4 CHANNEL 4 C11 BUCK REGULATOR COMP4 C13 FB4 (1.2A) UVLO, OCP, and TSD protection EN4 PGND4 48-lead, 7 mm 7 mm LFCSP package 1.7V TO 5.5V VOUT5 VOUT5 PVIN5 40C to +125C junction temperature CHANNEL 5 EN5 200mA LDO FB5 C15 C14 REGULATOR APPLICATIONS Small cell base stations EXPOSED PAD FPGA and processor applications Figure 1. Security and surveillance Medical applications GENERAL DESCRIPTION The ADP5052 combines four high performance buck regulators The switching frequency of the ADP5052 can be programmed and one 200 mA low dropout (LDO) regulator in a 48-lead LFCSP or synchronized to an external clock. The ADP5052 contains a package that meets demanding performance and board space precision enable pin on each channel for easy power-up sequencing requirements. The device enables direct connection to high input or adjustable UVLO threshold. voltages up to 15 V with no preregulators. The ADP5052 integrates a general-purpose LDO regulator with Channel 1 and Channel 2 integrate high-side power MOSFETs and low quiescent current and low dropout voltage that provides up low-side MOSFET drivers. External NFETs can be used in low-side to 200 mA of output current. power devices to achieve an efficiency optimized solution and Table 1. Family Models deliver a programmable output current of 1.2 A, 2.5 A, or 4 A. 2 Model Channels I C Package Combining Channel 1 and Channel 2 in a parallel configuration ADP5050 Four bucks, one LDO Yes 48-Lead LFCSP can provide a single output with up to 8 A of current. ADP5051 Four bucks, supervisory Yes 48-Lead LFCSP Channel 3 and Channel 4 integrate both high-side and low-side ADP5052 Four bucks, one LDO No 48-Lead LFCSP MOSFETs to deliver output current of 1.2 A. ADP5053 Four bucks, supervisory No 48-Lead LFCSP ADP5054 Four high current bucks No 48-Lead LFCSP Rev. D Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. 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Technical Support www.analog.com 10900-001ADP5052 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Power-Good Function ............................................................... 22 Applications ....................................................................................... 1 Thermal Shutdown .................................................................... 22 Typical Application Circuit ............................................................. 1 LDO Regulator ........................................................................... 22 General Description ......................................................................... 1 Applications Information .............................................................. 23 Revision History ............................................................................... 2 ADIsimPower Design Tool ....................................................... 23 Detailed Functional Block Diagram .............................................. 3 Programming the Adjustable Output Voltage ........................ 23 Specif icat ions ..................................................................................... 4 Voltage Conversion Limitations ............................................... 23 Buck Regulator Specifications .................................................... 5 Current-Limit Setting ................................................................ 23 LDO Regulator Specifications .................................................... 7 Soft Start Setting ......................................................................... 24 Absolute Maximum Ratings ............................................................ 8 Inductor Selection ...................................................................... 24 Thermal Resistance ...................................................................... 8 Output Capacitor Selection ....................................................... 24 ESD Caution .................................................................................. 8 Input Capacitor Selection .......................................................... 25 Pin Configuration and Function Descriptions ............................. 9 Low-Side Power Device Selection ............................................ 25 Typical Performance Characteristics ........................................... 11 Programming the UVLO Input ................................................ 25 Theory of Operation ...................................................................... 17 Compensation Components Design ....................................... 26 Buck Regulator Operational Modes ......................................... 17 Power Dissipation....................................................................... 26 Adjustable and Fixed Output Voltages .................................... 17 Junction Temperature ................................................................ 27 Internal Regulators (VREG and VDD) ................................... 17 Design Example .............................................................................. 28 Separate Supply Applications .................................................... 18 Setting the Switching Frequency .............................................. 28 Low-Side Device Selection ........................................................ 18 Setting the Output Voltage ........................................................ 28 Bootstrap Circuitry .................................................................... 18 Setting the Current Limit .......................................................... 28 Active Output Discharge Switch .............................................. 18 Selecting the Inductor ................................................................ 28 Precision Enabling ...................................................................... 18 Selecting the Output Capacitor ................................................ 29 Oscillator ..................................................................................... 18 Selecting the Low-Side MOSFET ............................................. 29 Synchronization Input/Output ................................................. 19 Designing the Compensation Network ................................... 29 Soft Start ...................................................................................... 19 Selecting the Soft Start Time..................................................... 29 Parallel Operation....................................................................... 20 Selecting the Input Capacitor ................................................... 29 Startup with Precharged Output .............................................. 20 Recommended External Components .................................... 30 Current-Limit Protection .......................................................... 20 Circuit Board Layout Recommendations ................................... 31 Frequency Foldback ................................................................... 21 Typical Application Circuits ......................................................... 32 Hiccup Protection ...................................................................... 21 Factory Default Options ............................................................ 35 Latch-Off Protection .................................................................. 21 Outline Dimensions ....................................................................... 36 Undervoltage Lockout (UVLO) ............................................... 22 Ordering Guide .......................................................................... 36 REVISION HISTORY 7/2017Rev. C to Rev. D 9/2015Rev. A to Rev. B Changes to Factory Default Options Section.............................. 35 Changes to Figure 1 and Table 1 ...................................................... 1 Updated Outline Dimensions ....................................................... 36 Changes to Ordering Guide .......................................................... 36 2/2014Rev. 0 to Rev. A Added Table 1 Renumbered Sequentially ..................................... 1 11/2016Rev.B to Rev. C Changes to Figure 13 and Figure 14............................................. 12 Deleted Factory Programmable Options Section and Table 16 to Changes to Table 11 ....................................................................... 24 Table 27 Renumbered Sequentially ............................................. 35 Updated Outline Dimensions ....................................................... 38 Changes to Factory Default Options Section.............................. 35 Added Endnote 1, Table 16 ........................................................... 35 5/2013Revision 0: Initial Version Rev. D Page 2 of 36