SHARC Processor ADSP-21369 SUMMARY DEDICATED AUDIO COMPONENTS High performance 32-bit/40-bit floating-point processor S/PDIF-compatible digital audio receiver/transmitter optimized for high performance audio processing 4 independent asynchronous sample rate converters (SRC) Single-instruction, multiple-data (SIMD) computational 16 PWM outputs configured as four groups of four outputs architecture ROM-based security features include On-chip memory2M bits of on-chip SRAM and 6M bits of JTAG access to memory permitted with a 64-bit key on-chip mask programmable ROM Protected memory regions that can be assigned to limit Code compatible with all other members of the SHARC family access under program control to sensitive code 400 MHz core instruction rate with unique audiocentric PLL has a wide variety of software and hardware multi- peripherals such as the digital applications interface, plier/divider ratios S/PDIF transceiver, serial ports, 8-channel asynchronous Available in 256-ball BGA ED and 208-lead LQFP EP sample rate converter, precision clock generators, and packages more. For complete ordering information, see Ordering Guide. Internal Memory SIMD Core Block 0 Block 1 Block 2 Block 3 RAM/ROM RAM/ROM RAM RAM Instruction 5 stage Cache Sequencer B2D B0D B1D B3D 64-BIT 64-BIT 64-BIT 64-BIT S DAG1/2 Timer DMD 64-BIT DMD 64-BIT PEx PEy Core Bus Internal Memory I/F Cross Bar PMD PMD 64-BIT 64-BIT IOD0 32-BIT FLAGx/IRQx/ EPD BUS 32-BIT JTAG TMREXP PERIPHERAL BUS 32-BIT IOD1 32-BIT IOD0 BUS MTM PERIPHERAL BUS EP IDP/ CORE PCG TIMER UART S/PDIF PCG ASRC SPORT CORE PWM TWI SPI/B AMI PDAP SDRAM Tx/Rx 3-0 7-0 FLAGS C-D 2-0 1-0 A-D FLAGS 3-0 7-0 DPI Routing/Pins DAI Routing/Pins External Port Pin MUX External DPI Peripherals DAI Peripherals Peripherals Port Figure 1. Functional Block Diagram SHARC and the SHARC logo are registered trademarks of Analog Devices, Inc. Rev. H Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 U.S.A. Specifications subject to change without notice. No license is granted by implication Tel: 781.329.4700 2019 Analog Devices, Inc. All rights reserved. or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective companies. Technical Support www.analog.comADSP-21369 TABLE OF CONTENTS General Description ................................................. 3 Maximum Power Dissipation ................................. 17 SHARC Family Core Architecture ............................ 4 Absolute Maximum Ratings ................................... 18 Family Peripheral Architecture ................................ 7 Timing Specifications ........................................... 18 I/O Processor Features ......................................... 10 Output Drive Currents ......................................... 50 System Design .................................................... 10 Test Conditions .................................................. 50 Development Tools ............................................. 11 Capacitive Loading .............................................. 50 Additional Information ........................................ 12 Thermal Characteristics ........................................ 52 Related Signal Chains .......................................... 12 256-Ball BGA ED Pinout ......................................... 53 Pin Function Descriptions ....................................... 13 208-Lead LQFP EP Pinout ....................................... 56 Specifications ........................................................ 16 Package Dimensions ............................................... 58 Operating Conditions .......................................... 16 Surface-Mount Design .......................................... 59 Electrical Characteristics ....................................... 17 Ordering Guide ..................................................... 60 ESD Caution ...................................................... 17 REVISION HISTORY 3/2019Rev. G to Rev. H Deleted obsolete models ADSP-21367 and ADSP-21368 throughout data sheet. Reorganized layout of data sheet. Rev. H Page 2 of 60 March 2019