ADUC834BCPZ

MicroConverter , Dual 16-Bit/24-Bit - a ADCs with Embedded 62 kB Flash MCU ADuC834 FEATURES FUNCTIONAL BLOCK DIAGRAM High Resolution - ADCs AV DD 2 Independent ADCs (16-Bit and 24-Bit Resolution) ADuC834 AV DD 24-Bit No Missing Codes, Primary ADC IEXC1 CURRENT 21-Bit rms (18.5-Bit p-p) Effective Resolution 20 Hz AIN1 SOURCE IEXC2 PRIMARY AIN2 BUF PGA Offset Drift 10 nV/ C, Gain Drift 0.5 ppm/ C MUX 24-BIT - ADC 12-BIT BUF DAC DAC Memory 62 Kbytes On-Chip Flash/EE Program Memory AIN3 AGND DUAL AIN4 AUXILIARY 16-BIT 4 Kbytes On-Chip Flash/EE Data Memory MUX PWM0 16-BIT - ADC - DAC AIN5 MUX Flash/EE, 100 Year Retention, 100 Kcycles Endurance TEMP DUAL PWM1 SENSOR 16-BIT 3 Levels of Flash/EE Program Memory Security PWM In-Circuit Serial Download (No External Hardware) EXTERNAL INTERNAL REFIN V BAND GAP REF High Speed User Download (5 Seconds) REFIN+ DETECT V REF 8051-BASED MCU WITH ADDITIONAL 2304 Bytes On-Chip Data RAM PERIPHERALS RESET 62 KBYTES FLASH/EE PROGRAM MEMORY 8051-Based Core 4 KBYTES FLASH/EE DATA MEMORY DV POR DD 2304 BYTES USER RAM 8051 Compatible Instruction Set 3 16 BIT TIMERS POWER SUPPLY MON DGND PLL AND PROG 32 kHz External Crystal WATCHDOG TIMER BAUD R ATE TIMER CLOCK DIV On-Chip Programmable PLL (12.58 MHz Max) 2 4 PARALLEL UART, SPI, AND I C WAKE-UP/ OSC PORTS SERIAL I/O 3 16-Bit Timer/Counter RTC TIMER 26 Programmable I/O Lines XTAL1 XTAL2 11 Interrupt Sources, Two Priority Levels Dual Data Pointer, Extended 11-Bit Stack Pointer On-Chip Peripherals GENERAL DESCRIPTION Internal Power on Reset Circuit The ADuC834 is a complete smart transducer front end, 12-Bit Voltage Output DAC integrating two high resolution - ADCs, an 8-bit MCU, and Dual 16-Bit - DACs/PWMs program/data Flash/EE memory on a single chip. On-Chip Temperature Sensor The two independent ADCs (primary and auxiliary) include a Dual Excitation Current Sources temperature sensor and a PGA (allowing direct measurement of Time Interval Counter (Wake-Up/RTC Timer) 2 low level signals). The ADCs with on-chip digital filtering and UART, SPI , and I C Serial I/O programmable output data rates are intended for the measurement High Speed Baud Rate Generator (Including 115,200) of wide dynamic range, low frequency signals, such as those in Watchdog Timer (WDT) weigh scale, strain-gage, pressure transducer, or temperature Power Supply Monitor (PSM) measurement applications. Power Normal: 2.3 mA Max 3.6 V (Core CLK = 1.57 MHz) The device operates from a 32 kHz crystal with an on-chip PLL Power-Down: 20 A Max with Wake-Up Timer Running generating a high frequency clock of 12.58 MHz. This clock is Specified for 3 V and 5 V Operation routed through a programmable clock divider from which the MCU Package and Temperature Range core clock operating frequency is generated. The microcontroller 52-Lead MQFP (14 mm 14 mm), 40 C to +125 C core is an 8052 and therefore 8051 instruction set compatible 56-Lead LFCSP (8 mm 8 mm), 40 C to +85 C with 12 core clock periods per machine cycle. 62 Kbytes of nonvolatile Flash/EE program memory, 4 Kbytes of APPLICATIONS nonvolatile Flash/EE data memory, and 2304 bytes of data RAM Intelligent Sensors are provided on-chip. The program memory can be configured Weigh Scales as data memory to give up to 60 Kbytes of NV data memory in Portable Instrumentation, Battery-Powered Systems data logging applications. 420 mA Transmitters Data Logging On-chip factory firmware supports in-circuit serial download and Precision System Monitoring debug modes (via UART), as well as single-pin emulation mode via the EA pin. The ADuC834 is supported by a QuickStart development system featuring low cost software and hardware development tools. Document Feedback REV. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Specifications subject to change without notice. No license is granted by implication Tel: 781.329.4700 20032016 Analog Devices, Inc. All rights reserved. or otherwise under any patent or patent rights of Analog Devices. Trademarks and www.analog.com registered trademarks are the property of their respective companies. Technical SupportADuC834 TABLE OF CONTENTS NONVOLATILE FLASH/EE MEMORY FEATURES . 1 Flash/EE Memory Overview 28 APPLICATIONS 1 Flash/EE Memory and the ADuC834 . 28 ADuC834 Flash/EE Memory Reliability . 29 FUNCTIONAL BLOCK DIAGRAM . 1 Flash/EE Program Memory . 30 GENERAL DESCRIPTION . 1 Serial Downloading . 30 Parallel Programming 30 SPECIFICATIONS 3 User Download Mode (ULOAD) 30 ABSOLUTE MAXIMUM RATINGS 9 Flash/EE Program Memory Security 31 Lock, Secure, and Serial Safe Modes 31 PIN CONFIGURATIONS . 9 Using the Flash/EE Data Memory 32 DETAILED BLOCK DIAGRAM 10 ECON . 32 Programming the Flash/EE Data Memory 33 PIN FUNCTION DESCRIPTIONS 10 Flash/EE Memory Timing 33 MEMORY ORGANIZATION . 13 OTHER ON-CHIP PERIPHERALS SPECIAL FUNCTION REGISTERS (SFRS) 14 DAC 34 Accumulator (ACC) . 14 Pulsewidth Modulator (PWM) . 36 B SFR (B) 14 On-Chip PLL 39 Data Pointer (DPTR) . 14 Time Interval Counter (Wake-Up/RTC Timer) 40 Stack Pointer (SP and SPH) 15 Watchdog Timer . 42 Program Status Word (PSW) 15 Power Supply Monitor . 43 Power Control SFR (PCON) 15 Serial Peripheral Interface (SPI) 44 2 ADuC834 Configuration SFR (CFG834) 15 I C Serial Interface 46 Complete SFR Map . 16 Dual Data Pointer 48 ADC SFR INTERFACE 8052 COMPATIBLE ON-CHIP PERIPHERALS ADCSTAT . 17 Parallel I/O Ports 03 49 ADCMODE 18 Timers/Counters . 52 ADC0CON . 19 UART Serial Interface . 57 ADC1CON . 19 UART Operating Modes . 57 ADC0H/ADC0M/ADC0L/ADC1H/ADC1L 20 Baud Rate Generation Using Timer 1 and Timer 2 . 59 OF0H/OF0M/OF0L/OF1H/OF1L . 20 Baud Rate Generation Using Timer 3 . 60 GN0H/GN0M/GN0L/GN1H/GN1L 20 Interrupt System . 61 SF 21 HARDWARE DESIGN CONSIDERATIONS ICON 21 External Memory Interface . 63 PRIMARY AND AUXILIARY ADC NOISE Power Supplies . 64 PERFORMANCE . 22 Power-On Reset (POR) Operation 64 Power Consumption 64 PRIMARY AND AUXILIARY ADC CIRCUIT Power Saving Modes 65 DESCRIPTION Wake-Up from Power-Down Latency . 65 Overview . 23 Grounding and Board Layout Recommendations 65 Primary ADC 23 ADuC834 System Self-Identification 66 Auxiliary ADC . 24 Clock Oscillator 66 Analog Input Channels 24 Primary and Auxiliary ADC Inputs . 25 OTHER HARDWARE CONSIDERATIONS Analog Input Ranges 25 In-Circuit Serial Download Access . 67 Programmable Gain Amplifier . 25 Embedded Serial Port Debugger . 67 Bipolar/Unipolar Inputs 25 Single-Pin Emulation Mode . 67 Reference Input 26 Typical System Configuration . 68 Burnout Currents . 26 QUICKSTART DEVELOPMENT SYSTEM . 69 Excitation Currents . 26 Reference Detect . 26 TIMING SPECIFICATIONS 70 - Modulator . 26 OUTLINE DIMENSIONS 80 Digital Filter 27 ADC Chopping 28 ORDERING GUIDE . 80 Calibration 28 REVISION HISTORY 81 2 REV. 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