MicroConverter , Dual 16-Bit Sigma-Delta ADCs with Embedded 62 kB Flash MCU ADuC836 FEATURES FUNCTIONAL BLOCK DIAGRAM High Resolution - ADCs AV DD 2 Independent ADCs (16-Bit Resolution) AV ADuC836 DD 16-Bit No Missing Codes, Primary ADC IEXC1 CURRENT AIN1 SOURCE 16-Bit rms (16-Bit p-p) Effective Resolution 20 Hz IEXC2 PRIMARY AIN2 BUF PGA MUX 16-BIT - ADC Offset Drift 10 nV/C, Gain Drift 0.5 ppm/C 12-BIT BUF DAC DAC Memory 62 Kbytes On-Chip Flash/EE Program Memory AIN3 AGND DUAL AIN4 AUXILIARY 16-BIT 4 Kbytes On-Chip Flash/EE Data Memory MUX PWM0 16-BIT - ADC - DAC AIN5 MUX Flash/EE, 100 Year Retention, 100 Kcycles Endurance TEMP DUAL PWM1 SENSOR 16-BIT 3 Levels of Flash/EE Program Memory Security PWM In-Circuit Serial Download (No External Hardware) EXTERNAL INTERNAL REFIN V BAND GAP High Speed User Download (5 Seconds) REF REFIN+ DETECT V REF 8051-BASED MCU WITH ADDITIONAL 2304 Bytes On-Chip Data RAM PERIPHERALS RESET 62 KBYTES FLASH/EE PROGRAM MEMORY 8051 Based Core 4 KBYTES FLASH/EE DATA MEMORY DV POR 8051 Compatible Instruction Set DD 2304 BYTES USER RAM 3 16 BIT TIMERS POWER SUPPLY MON 32 kHz External Crystal DGND PLL AND PROG BAUD RATE TIMER WATCHDOG TIMER CLOCK DIV On-Chip Programmable PLL (12.58 MHz Max) 2 4 PARALLEL UART, SPI, AND I C WAKE-UP/ 3 16-Bit Timer/Counter OSC SERIAL I/O PORTS RTC TIMER 26 Programmable I/O Lines 11 Interrupt Sources, 2 Priority Levels XTAL1 XTAL2 Dual Data Pointer, Extended 11-Bit Stack Pointer On-Chip Peripherals GENERAL DESCRIPTION Internal Power on Reset Circuit The ADuC836 is a complete smart transducer front end, integrating 12-Bit Voltage Output DAC two high resolution - ADCs, an 8-bit MCU, and program/data Dual 16-Bit - DACs/PWMs Flash/EE memory on a single chip. On-Chip Temperature Sensor Dual Excitation Current Sources The two independent ADCs (primary and auxiliary) include a Time Interval Counter (Wake-Up/RTC Timer) temperature sensor and a PGA (allowing direct measurement 2 UART, SPI , and I C Serial I/O of low level signals). The ADCs with on-chip digital lfi tering and High Speed Baud Rate Generator (Including 115,200) programmable output data rates are intended for the measure- Watchdog Timer (WDT) ment of wide dynamic range, low frequency signals, such as those Power Supply Monitor (PSM) in weigh scale, strain gage, pressure transducer, or temperature Power measurement applications. Normal: 2.3 mA Max 3.6 V (Core CLK = 1.57 MHz) The device operates from a 32 kHz crystal with an on-chip PLL Power-Down: 20 A Max with Wake-Up Timer Running generating a high frequency clock of 12.58 MHz. This clock is Specified for 3 V and 5 V Operation routed through a programmable clock divider from which the MCU Package and Temperature Range core clock operating frequency is generated. The microcontroller 52-Lead MQFP (14 mm 14 mm), 40C to +125C core is an 8052 and therefore 8051 instruction set compatible 56-Lead LFCSP (8 mm 8 mm), 40C to +85C with 12 core clock periods per machine cycle. APPLICATIONS 62 Kbytes of nonvolatile Flash/EE program memory, 4 Kbytes of Intelligent Sensors nonvolatile Flash/EE data memory, and 2304 bytes of data RAM Weigh Scales are provided on-chip. The program memory can be configured as Portable Instrumentation, Battery-Powered Systems data memory to give up to 60 Kbytes of NV data memory in data 420 mA Transmitters logging applications. Data Logging On-chip factory firmware supports in-circuit serial download and Precision System Monitoring debug modes (via UART), as well as single-pin emulation mode via the EA pin. The ADuC836 is supported by a QuickStart development system featuring low cost software and hardware development tools. REV. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. that may result from its use. No license is granted by implication or other- Tel: 781.329.4700 20032016 Analog Devices, Inc. All rights reserved. wise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective companies. www.analog.com Technical Support ADuC836 ADuC836 TABLE OF CONTENTS FEATURES 1 NONVOLATILE FLASH/EE MEMORY Flash/EE Memory Overview 29 APPLICATIONS 1 Flash/EE Memory and the ADuC836 .29 FUNCTIONAL BLOCK DIAGRAM 1 ADuC836 Flash/EE Memory Reliability .29 Flash/EE Program Memory 30 GENERAL DESCRIPTION .1 Serial Downloading .30 SPECIFICATIONS 3 Parallel Programming .30 User Download Mode (ULOAD) 31 ABSOLUTE MAXIMUM RATINGS .9 Flash/EE Program Memory Security 31 Lock, Secure, and Serial Safe Modes 31 ORDERING GUIDE .9 Using the Flash/EE Data Memory .32 PIN CONFIGURATIONS .9 ECON 32 Programming the Flash/EE Data Memory .33 DETAILED BLOCK DIAGRAM 10 Flash/EE Memory Timing 33 PIN FUNCTION DESCRIPTIONS 10 OTHER ON-CHIP PERIPHERALS MEMORY ORGANIZATION .13 DAC .34 PWM .36 SPECIAL FUNCTION REGISTERS (SFRS) 14 On-Chip PLL 39 Accumulator SFR (ACC) 14 Time Interval Counter (Wake-Up/RTC Timer) .40 B SFR (B) 14 Watchdog Timer .42 Data Pointer (DPTR) .14 Stack Pointer (SP and SPH) 15 Power Supply Monitor 43 Program Status Word (PSW) 15 Serial Peripheral Interface (SPI) .44 2 Power Control SFR (PCON) .15 I C Serial Interface .46 ADuC836 Configuration SFR (CFG836) 15 Dual Data Pointer .48 Complete SFR Map 16 8052 COMPATIBLE ON-CHIP PERIPHERALS ADC SFR INTERFACE Parallel I/O Ports 03 .49 ADCSTAT .17 Timers/Counters .52 ADCMODE 18 UART Serial Interface 57 ADC0CON 19 UART Operating Modes .57 ADC1CON 19 Baud Rate Generation Using Timer 1 and Timer 2 .59 ADC0H/ADC0M/ADC1H/ADC1L 20 Baud Rate Generation Using Timer 3 .60 OF0H/OF0M/OF1H/OF1L 20 Interrupt System .61 GN0H/GN0M/GN1H/GN1L .20 HARDWARE DESIGN CONSIDERATIONS SF 21 External Memory Interface .63 ICON .21 Power Supplies 64 PRIMARY AND AUXILIARY ADC NOISE Power-On Reset (POR) Operation .64 PERFORMANCE 22 Power Consumption 64 Power Saving Modes 65 PRIMARY AND AUXILIARY ADC CIRCUIT Wake-Up from Power-Down Latency .65 DESCRIPTION Grounding and Board Layout Recommendations 66 Overview .23 ADuC836 System Self-Identification 66 Primary ADC .23 Clock Oscillator .66 Auxiliary ADC 24 Analog Input Channels 24 OTHER HARDWARE CONSIDERATIONS Primary and Auxiliary ADC Inputs .25 In-Circuit Serial Download Access .67 Analog Input Ranges 25 Embedded Serial Port Debugger .67 Programmable Gain Amplifier .25 Single-Pin Emulation Mode 67 Bipolar/Unipolar Inputs .25 Typical System Configuration .68 Reference Input .26 Burnout Currents 26 QUICKSTART DEVELOPMENT SYSTEM .69 Excitation Currents .26 TIMING SPECIFICATIONS .70 Reference Detect .26 - Modulator 26 OUTLINE DIMENSIONS .80 Digital Filter 27 ADC Chopping 28 Calibration .28 REV. B 2 REV. A 3