DEMO MANUAL DC1685A LTC6417 and LTC2209 Combo Board DESCRIPTION Demonstration circuit 1685A features the LTC 6417, a at the inputs. The DC1685A has been developed from the 1.6GHz differential ADC buffer driving the LTC2209, a 16-bit DC1281A, used to characterize LTC2209 family of ADCs. 160Msps ADC. The DC1685B is supplied with a bandpass Use the DC1685A with a DC890 FastDAACS and PScope filter centered at 140MHz between the buffer and ADC. Software to collect time and frequency data. The filter center frequency can be changed to optimize Design files for this circuit board are available. performance at different analog input frequencies. Both single-ended and differential configurations are supported All registered trademarks and trademarks are the property of their respective owners. QUICK START PROCEDURE DC1685A is easy to set up. Refer to Figure 1 for proper signal generator harmonics, non-harmonically related measurement equipment setup and follow the procedure spurs and broadband noise. Low phase noise (jitter) below: Agilent 8644B generators are used with the TTE band- pass filters for the clock and analog input. 1. Apply power to the DC1685A 3.3V across the pins marked V and PWR GND and 5V across AMP POWER 4. Connect the analog input to the DC1685A to the SMA CC and PWR GND. The DC1685A requires up to 800mA connector marked (J6) IN+ at 140MHz. This input is from the V , and 200mA from the AMP POWER. capacitively coupled to a 1:4 balun transformer WBC4-11. CC 2. Supply power to the DC890B fast DAACS board with an 5. Start and configure PScope data collection software for external 6V 0.5V, 1A on turrets G7(+) and G1() or the the FastDAACS (DC890) by selecting AutoConfigure. adjacent 2.1mm power jack. Unless the DC890B detects If the board is not detected, update PScope for latest external power, it will not activate the LVDS mode of the software and device list, and then select LTC2209 from Xilinx Spartan-III FPGA. The FPGA actively terminates the Configure Device menu. You can also manually the LVDS repeaters at the outputs of the LTC2209. configure PScope for the LTC2209 by setting the pa- rameters listed in Table 1. 3. Connect encode clock to the DC1685A on the SMA connector marked (J3) Encode Clock. This transformer 6. Collect data by clicking on the Collect button. Time and coupled input is terminated with a 100 at the ADC frequency plots will be displayed in the PScope window. clock inputs. For best noise performance the clock input Consult the DC890B Quick Start Guide for more details. must be driven with a very low jitter source. When us- This procedure contains only one critical sequence. ing a sinusoidal generator, the amplitude should be as The user must apply supply voltage before applying large as possible, up to 13dBm. Using bandpass filters signal power to the analog and clock inputs or forc- on the clock and analog inputs will improve the noise ing a voltage to any other turrets. The user must also performance by reducing the wideband noise power of remove the signal to the analog and clock inputs and the signals. Data sheet FFT plots are taken with 10 pole voltages on any other turret before turning down the LC filters made by TTE (Los Angeles, CA) to suppress supply voltage. Rev 0 1DEMO MANUAL DC1685A QUICK START PROCEDURE Table 2 summarizes the function of each SMA connector and Buffer ADC Interface jumper on the board and their suggested default settings. The LTC6417 has been specifically designed to interface directly with high speed A/D converters. In Figure 2, the Table 1. PScope User Configuration for LTC2209. differential LTC6417 outputs are bandpass filtered to drive USER CONFIGURE the differential inputs of the LTC2209. Such a filter sup- Bits 16 presses harmonics and limits the wideband noise of the Channels 1 amplifier to achieve the best SFDR and SNR. Table 3 lists Alignment 16 component values suggested for bandpass filters optimized FPGA Ld LVDS for various input frequencies. The 1:4 transformer at the Bipolar x input of the LTC6417 performs a single-ended to differential Positive Edge Clk x conversion and provides 6dB voltage gain. For more detail on the LTC6417 and LTC2209, consult Table 2. DC1685A Connector and Jumpers the data sheets. CONNECTOR/ JUMPER FUNCTION Table 3. Bandpass Filter Component Values for Various Input Frequencies J2 (MODE) ADC Output Format and Clock Duty Stabilizer CDS. Default to V for twos complement and CDS off. CC INPUT FREQUENCIES J3 (SHDN) ADC Power Shutdown. Default to RUN. COMPONENTS 70MHz 140MHz 270MHz 380MHz J3 (DITH) ADC Internal Dither Enable. Default to OFF to disable R12 = R36 60.4 60.4 60.4 60.4 internal dither. C43 = C44 pF 56 27 15 12 J4 (PGA) ADC Programmable Gain Amplifier. Default to 1 E1 = E2 nH 100 51 27 18 gain mode. C41 pF 47 12 12 10 J5 (IN) Differential Input. Not connected by default. Install capacitor C9 to drive the input differentially. C10 = C40 pF 13 12 33 2.7 J6 (IN+) Differential Input. Connected to input balun for E5 nH 100 51 27 18 single-ended operation. Drive from a 50 signal R42 = R43 300 300 300 300 source. No external termination needed. R53 120 120 120 120 J7 (ENCODE Single-Ended Input. Drive with a 13dBm low jitter CLOCK) 50 source. C45 = C46 pF 39 18 10 8.2 J11 (OR) Overrange Output. Connect to an oscilloscope input. E3 = E4 nH 150 75 39 27 Rev 0 2