DC1766A-B Analog Devices

DEMO MANUAL DC1766A LTC6957-3/LTC6957-4 Low Phase Noise, Dual CMOS Output Buffer/Driver/Logic Converter Description Demonstration Circuit 1766A features the LTC 6957-3/ differential sine wave or square-wave input signal. Supply LTC6957-4, a low phase noise, dual CMOS output buffer/ the DC1766A with 3.3V and it is ready to function. Or, the driver/logic converter. output can be powered from a lower voltage supply if a lower voltage CMOS driver is desired. The DC1766A gives The DC1766A provides SMA connectors for the differential extra component population options to make it compatible inputs and the CMOS outputs. The inputs are terminated with different logic signal types. to on-board 50 resistors and the outputs present similar impedance. The DC1766A allows the user to take advantage Design files for this circuit board are available at of the shutdown and bandwidth selection features of the DEMO MANUAL DC1766A Quick s Dp The DC1766A is very straightforward to operate. Refer to 5. Configure the input bandwidth of the LTC6957 with the Figure 1 for the following discussion. use of FILTA (JP1) and FILTB (JP2) jumpers. Follow the instructions given in the LTC6957 data sheet to choose DC1766A Configuration the correct bandwidth given an input signal. 1. Apply a low-noise and low-spurious 3.3V supply between 6. Shut down an unused output by using jumper SD1 (JP3) the V+ (E1) and GND (E2) turrets. to shutdown OUT1 or jumper SD2 (JP4) to shutdown OUT2. 2. Make sure that jumper VDD (JP7) is at the V+ position if 3.3V CMOS output operation is desired. Otherwise, DC1766A Reconfiguration apply a voltage that is between 2.4V and 3.3V between the VDD (E4) and GND (E3) turrets, and move jumper The DC1766A is flexible and allows the connectivity of a VDD (JP7) to EXT position to operate the CMOS outputs variety of input and output signal types. The DC1766A is at the voltage level supplied at the VDD turret. configured as shown in the schematic diagram. However, the DC1766A allows the installation of different input and 3. Connect a low phase noise (or jitter) single-ended or output configurations to adapt to a variety of logic sig- differential input signal to IN+ (J1) and/or IN (J2) nals. Refer to the Applications Information section of the SMA connectors. Refer to the LTC6957 data sheet for LTC6957 data sheet for all possible connectivity options appropriate input signal types and levels. that can be implemented by modifying the DC1766A. 4. Connect either of the outputs (OUT1, J3 or OUT2, J4) to a high-speed scope, spectrum analyzer or a signal analyzer to start the evaluation of the LTC6957. NOTE: The CMOS outputs of the DC1766A are AC- coupled and attenuated through two 100 resistors as shown in the DC1766A schematic diagram to present a 50 source impedance appropriate to connect to a 50 input impedance instrument. dc1766af 2 ure roce tart