19-5595 Rev 10/10 DS1646/DS1646P Nonvolatile Timekeeping RAM www.maxim-ic.com FEATURES PIN CONFIGURATIONS Integrates NV SRAM, Real-Time Clock, N.C. 1 32 V CC Crystal, Power-Fail Control Circuit and A16 31 A15 2 Lithium Energy Source A14 N.C. 3 30 A12 4 29 WE Clock Registers are Accessed Identically to A7 5 28 A13 the Static RAM. These Registers are A6 6 27 A8 A5 A9 Resident in the Eight Top RAM Locations 7 26 A4 8 25 A11 Totally Nonvolatile with Over 10 Years of A3 OE 9 24 Operation in the Absence of Power A2 10 23 A10 CE A1 11 22 BCD-Coded Year, Month, Date, Day, Hours, 12 21 A0 DQ7 Minutes, and Seconds with Leap Year 13 20 DQ0 DQ6 Compensation Valid Up to 2100 14 19 DQ1 DQ5 DQ2 15 18 DQ4 Power-Fail Write Protection Allows for 16 17 DQ3 GND 10% V Power Supply Tolerance CC 32-Pin Encapsulated Package DS1646 only (DIP Module) Standard JEDEC Bytewide 128k x 8 RAM Pinout 34 N.C. 1 N.C. DS1646P Only (PowerCap Module Board) 33 N.C. 2 A15 3 32 A14 A16 31 4 A13 Surface Mountable Package for Direct PFO 30 A12 V 5 CC A11 Connection to PowerCap Containing 6 29 WE 7 28 A10 OE Battery and Crystal 27 8 A9 CE 9 26 A8 DQ7 Replaceable Battery (PowerCap) 25 10 A7 DQ6 24 11 A6 DQ5 Power-Fail Output 23 A5 12 DQ4 22 13 A4 Pin-for-Pin Compatible with Other Densities DQ3 21 A3 14 DQ2 15 20 A2 of DS164xP Timekeeping RAM DQ1 X1 GND V X2 BAT 19 16 A1 DQ0 Underwriters Laboratories (UL) Recognized 18 A0 17 GND 34-Pin PowerCap Module Board (Uses DS9034PCX+ or DS9034I-PCX+ PowerCap) ORDERING INFORMATION VOLTAGE PART TEMP RANGE PIN-PACKAGE TOP MARK RANGE (V) DS1646-120+ 5.0 0C to +70C 32 EDIP (0.740a) DS1646+120 DS1646P-120+ 5.0 0C to +70C 34 PowerCap* DS1646P+120 +Denotes a lead(Pb)-free/RoHS-compliant package. *DS9034-PCX+ or DS9034I-PCX+ required (must be ordered separately). A indicates a lead(Pb)-free product. The top mark will include a symbol on lead(Pb)-free devices. 1 of 12 DS1646/DS1646P PIN DESCRIPTION PIN NAME FUNCTION PDIP PowerCap 1, 30 1, 33, 34 N.C. No Connection 2 3 A16 3 32 A14 4 30 A12 5 25 A7 6 24 A6 7 23 A5 8 22 A4 9 21 A3 Address Input 10 20 A2 11 19 A1 12 18 A0 25 29 A11 26 27 A9 27 26 A8 28 31 A13 13 16 DQ0 14 15 DQ1 15 14 DQ2 17 13 DQ3 Data Input/Output 18 12 DQ4 19 11 DQ5 20 10 DQ6 21 9 DQ7 16 17 GND Ground 22 8 CE Active-Low Chip Enable 23 28 A10 Address Input 24 7 OE Active-Low Output Enable 29 6 WE Active-Low Write Enable 31 2 A15 Address Input 32 5 V Power-Supply Input CC Active-Low Power-Fail Output, Open Drain. Requires a pullup 4 PFO resistor for proper operation. X1, X2, Crystal Connection, V Battery Connection BAT V BAT 2 of 12