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EVAL-ADM1272EBZ

EVAL-ADM1272EBZ electronic component of Analog Devices

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Power Management IC Development Tools EVALUATION BOARD

Manufacturer: Analog Devices
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EVAL-ADM1272EBZ
Analog Devices

1 : USD 178.9242
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Obsolete
     
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High Voltage Positive Hot Swap Controller and Digital Power Monitor with PMBus Data Sheet ADM1272 adjusted down, if required, using a resistor divider network FEATURES from the VCAP regulator output voltage to the ISET pin. An Controls supply voltages from 16 V to 80 V (absolute additional resistor can also be placed from ISET to VIN (or VOUT) to maximum 120 V) allow the current limit to track inversely with the rail voltage. High voltage (80 V) IPC-9592 compliant packaging This resistor allows an approximate system power limit to be used. <500 ns response time to short circuit FET energy monitoring for adaptable FET SOA protection The ADM1272 limits the current through the sense resistor by Gate boost mode for fast recovery from OC transients controlling the gate voltage of an external N channel field effect Programmable random start mode to stagger power-on transistor (FET) in the power path. The sense voltage, and there- FET fault detection fore the load current, is maintained below the preset maximum. Remote temperature sensing with programmable warning The ADM1272 protects the external FET by monitoring and and shutdown thresholds limiting the energy transfer through the FET while the current Programmable 2.5 mV to 30 mV system current-limit setting is being controlled. This energy limit is set by the choice of compo- range nents connected to the EFAULT pin (for fault protection 0.85% accurate current measurement with 12-bit ADC mode) and the ESTART pin during startup. Therefore, I , V , V , temperature, power, and energy telemetry LOAD IN OUT different energy limits can be set for start-up and normal fault Programmable start-up current limit conditions. During startup, inrush currents are maintained very Programmable linear output voltage soft start low and different areas of the safe operating area (SOA) curve 1% accurate UV and OV thresholds are of interest, whereas during fault conditions, the currents Programmable hot swap restart function can be much higher. 2 programmable GPIO pins The controller uses the drain to source voltage (V ) across the DS Reports power and energy consumption FET to set the current profile of the EFAULT and ESTART pins Peak detect registers for current, voltage, and power and, therefore, the amount of much energy allowed to be PMBus fast mode compliant interface transferred in the FET. This energy limit ensures the MOSFET 48-lead 7 mm 8 mm LFCSP remains within the SOA limits. Optionally, use a capacitor on APPLICATIONS the DVDT pin to set the output voltage ramp rate, if required. In case of a short-circuit event, a fast internal overcurrent 48 V/54 V systems detector responds in hundreds of ns and signals the gate to shut Servers down. A 1.5 A pull-down device ensures a fast FET response. The Power monitoring and control/power budgeting gate then recovers control within 50 s to ensure minimal Central office equipment disruption during conditions, such as line steps and surges. The Telecommunication and data communication equipment ADM1272 features overvoltage (OV) and undervoltage (UV) Industrial applications protection, programmed using external resistor dividers on the GENERAL DESCRIPTION UVH, UVL, and OV pins. The use of two pins for undervoltage The ADM1272 is a hot swap controller that allows a circuit board allows independent accurate rising and falling thresholds. The to be removed from or inserted into a live backplane. It also PWRGD output pin signals when the output voltage is valid features current, voltage, and power readback via an integrated and the gate is sufficiently enhanced. The validity of VOUT is 12-bit analog-to-digital converter (ADC), accessed using a determined using the PWGIN pin. PMBus interface. This device is able to withstand up to 120 V, The 12-bit ADC measures the voltage across the sense resistor, which makes it very robust in surviving surges and transients the supply voltage on the SENSE+ pin, the output voltage, and commonly associated with high voltage systems, usually clamped the temperature using an external NPN/PNP device. A PMBus using protection devices such as transient voltage suppressors interface allows a controller to read data from the ADC. As (TVSs) that can often exceed 100 V. 2 many as 16 unique I C addresses can be selected, depending on The load current, ILOAD, is measured using an internal current how the two ADRx pins are connected. The ADM1272 is available sense amplifier that measures the voltage across a sense resistor in a custom 48-lead LFCSP (7 mm 8 mm) with a pinstrap mode in the power path via the SENSE+ and SENSE pins. A default that allows the device to be configured for automatic retry or current limit sense voltage of 30 mV is set, but this limit can be latchoff when an overcurrent (OC) fault occurs. Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. Tel: 781.329.4700 20172020 Analog Devices, Inc. All rights reserved. No license is granted by implication or otherwise under any patent or patent rights of Analog Technical Support www.analog.com Devices. Trademarks and registered trademarks are the property of their respective owners. ADM1272 Data Sheet TABLE OF CONTENTS 2 Features .............................................................................................. 1 Partial Transactions on I C Bus ............................................... 30 Applications ...................................................................................... 1 SMBus Message Formats .......................................................... 30 General Description ......................................................................... 1 Group Commands ..................................................................... 32 Revision History ............................................................................... 3 Hot Swap Control Commands ................................................. 32 Functional Block Diagram .............................................................. 4 ADM1272 Information Commands ........................................ 32 Specifications .................................................................................... 5 Status Commands ...................................................................... 33 Power Monitoring Accuracy Specifications ............................. 9 GPO and Alert Pin Setup Commands .................................... 33 Serial Bus Timing Characteristics ............................................ 10 Power Monitor Commands ...................................................... 34 Absolute Maximum Ratings ......................................................... 11 Warning Limit Setup Commands ........................................... 35 Thermal Characteristics ............................................................ 11 PMBus Direct Format Conversion .......................................... 35 ESD Caution................................................................................ 11 Voltage And Current Conversion Using LSB Values ........... 36 Pin Configuration and Function Descriptions .......................... 12 Applications Information ............................................................. 38 Typical Performance Characteristics ........................................... 15 General-Purpose Output Pin Behavior ................................... 38 Theory of Operation ...................................................................... 20 Faults and Warnings .................................................................. 38 Powering the ADM1272 ............................................................ 20 Generating an Alert ................................................................... 38 UV and OV ................................................................................. 20 Handling/Clearing an Alert ...................................................... 38 Hot Swap Current Sense Inputs ............................................... 20 SMBus Alert Response Address ............................................... 39 Current-Limit Modes ................................................................ 21 Example Use of SMBus ARA.................................................... 39 Setting the Current Limits (ISET/ISTART) ........................... 21 Digital Comparator Mode ........................................................ 39 Setting a Linear Output Voltage Ramp at Power-Up (DVDT) Register Details ............................................................................... 40 ....................................................................................................... 23 Operation Register ..................................................................... 40 Safe Operating Area Protection (ESTART/EFAULT) .......... 24 Clear Faults Register .................................................................. 40 FET Gate Drive ........................................................................... 24 PMBus Capability Register ....................................................... 40 Fast Response to Severe Overcurrent ...................................... 24 Output Voltage Overvoltage Warning Limit Register .......... 40 MCB ............................................................................................. 25 Output Voltage Undervoltage Warning Limit Register ....... 41 RND ............................................................................................. 25 Output Current Overcurrent Warning Limit Register ......... 41 Voltage Transients ..................................................................... 25 Overtemperature Fault Limit Register .................................... 41 Surge and Transient Recovery .................................................. 25 Overtemperature Warning Limit Register ............................. 41 Power Good ................................................................................ 25 Input Voltage Overvoltage Warning Limit Register ............. 41 Fault Pin ....................................................................................... 26 Input Voltage Undervoltage Warning Limit Register .......... 42 Restart Pin ................................................................................... 26 Overpower Warning Limit Register ........................................ 42 Hot Swap Retry ........................................................................... 26 Status Byte Register .................................................................... 42 ENABLE Input ............................................................................ 26 Status Word Register ................................................................. 43 Remote Temperature Sensing .................................................. 26 Output Voltage Status Register ................................................ 44 FET Health .................................................................................. 27 Output Current Status Register ............................................... 44 Power Monitor ........................................................................... 27 Input Status Register .................................................................. 44 PMBus Interface ............................................................................. 29 Temperature Status Register .................................................... 45 Device Addressing ...................................................................... 29 Manufacturer Specific Status Register .................................... 45 SMBus Protocol Usage .............................................................. 29 Read Energy Register ................................................................. 46 Packet Error Checking ............................................................... 29 Read Input Voltage Register ..................................................... 46 Rev. B Page 2 of 57

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