LT8672HMS#PBF Analog Devices

LT8672 Active Rectifier Controller with Reverse Protection FEATURES DESCRIPTION n AEC-Q100 Qualified for Automotive Applications The LT 8672 is an active rectifier controller for reverse n Reverse Input Protection to 40V input protection. It drives an external N-channel MOSFET n Improved Performance Compared to a to replace a power Schottky diode. Its very low quiescent Schottky Diode current and fast transient response meet the tough require- n Reduce Power Dissipation by >90% ments in automotive applications where AC input signals n Reduce Drop to 20mV of up to 100kHz are present. These signals are rectified n Ultrafast Transient Response with minimum power dissipation on the external FET, n Rectifies 6V Up to 50kHz simplifying thermal management on the PCB. P-P n Rectifies 2V Up to 100kHz P-P With a drop of only 20mV, the LT8672 solution eases the n Wide Operating Voltage Range: 3V to 42V minimum input voltage requirement during cold crank n Low 20A Quiescent Current in Operation and start-stop, allowing simpler and more efficient cir- n Low 3.5A Shutdown Current cuits. If the input power source fails or is shorted, a fast n Accurate 1.21V Enable Pin Threshold turn-off minimizes reverse current transients. An available n Small 10-Lead MSOP Package, 10-Lead 3mm shutdown mode reduces the quiescent current to 3.5A. 2mm DFN Package and 3mm 2mm Side-Wettable An integrated auxiliary boost regulator provides the re- DFN Package quired boost voltage to turn the external FET fully on. A APPLICATIONS power good pin signals when the external FET is ready to take load current. n Automotive Battery Protection All registered trademarks and trademarks are the property of their respective owners. n Industrial Supplies n Portable Instrumentation TYPICAL APPLICATION Rectification of Input Ripple 12V, 5A Automotive Reverse Battery Protection TO SYSTEM LOADS IPD100N06S4-03 V BATT V OUT 12V 5A + TPSMB33A 4.7F 470F 1F 100H 33V V OUT 2V/DIV TPSMB18A SOURCE GATE DRAIN AUX AUXSW 18V V BATT 2V/DIV LT8672 ON OFF EN/UVLO PG GND 8672 TA01b 8672 TA01a 500s/DIV Rev. D 1 Document Feedback For more information www.analog.comLT8672 ABSOLUTE MAXIMUM RATINGS (Notes 1 and 2) Operating Junction Temperature Range (Notes 3, 4) DRAIN ...................................................... 0.3V to 42V E-, I-Grades ..................................... 40C to 125C SOURCE, EN/UVLO ................................... 40V to 42V J-, H-Grades .................................... 40C to 150C DRAINSOURCE ......................................... 5V to 54V Storage Temperature Range ................ 65C to 150C AUX .......................................................... V + 13V DRAIN Lead Temperature (Soldering, 10 sec) GATE .........................V 0.3V to V + 17V SOURCE SOURCE MS Package .................................................... 300C GATE ................................... V 67V to V + 0.3V AUX AUX PG .............................................................. 0.3V to 5V PIN CONFIGURATION TOP VIEW TOP VIEW EN/UVLO 1 10 GATE EN/UVLO 1 10 GATE GND 2 9 SOURCE GND 2 9 SOURCE 11 PG 3 8 DRAIN PG 3 8 DRAIN GND 4 7 AUX GND 4 7 AUX NC 5 6 AUXSW NC 5 6 AUXSW MS PACKAGE 10-LEAD PLASTIC MSOP DDB/DDBM PACKAGE 10-LEAD (3mm 2mm) PLASTIC DFN = 160C/W JA = 76C/W, = 13.5C/W JA JC EXPOSED PAD (PIN 11) MUST BE SHORTED TO GND OR LEFT FLOATING Rev. D 2 For more information www.analog.com