Evaluate: MAX3872/MAX3874 19-2767 Rev 0, 2/03 MAX3872/MAX3874 Evaluation Kits General Description Ordering Information The MAX3872/MAX3874 evaluation kits (EV kits) simplify PART TEMP. RANGE IC PACKAGE evaluation of the MAX3872 and MAX3874 clock and data MAX3872EVKIT -40C to +85C 32 QFN recovery with limiting amplifier ICs. These EV kits enable MAX3874EVKIT -40C to +85C 32 QFN testing of all MAX3872 and MAX3874 functions. SMA connectors are provided for the differential inputs and outputs. All high-speed inputs and outputs have on-board AC-coupling capacitors to allow direct connection to 50 Component Suppliers test equipment. SUPPLIER PHONE FAX Features AVX 843-448-9411 843-626-3123 Coilcraft 847-639-6400 847-639-1469 SMA Connectors for All High-Speed I/Os Digi-Key 800-344-4539 218-681-3380 Operational Mode Select Pins EF Johnson 402-474-4800 402-474-4858 Loss-of-Lock LED Murata 770-436-1300 770-436-3030 Note: Please indicate that you are using the Single +3.3V Power-Supply Operation MAX3872/MAX3874 when ordering from these suppliers. Fully Assembled and Tested Component List DESIGNATION QTY DESCRIPTION DESIGNATION QTY DESCRIPTION SMA connectors C1C7, C17 0.1 F 10% ceramic capacitors (0402) C19, C22, C24, 14 J1J8, J25, J26 10 (edge-mount, round-pin) C26, C28 Murata GRM36X7R104K016A EF JOHNSON 142-0701-851 0.001 F 10% ceramic J9, J12J15, 8 3-pin headers (0.1in centers) capacitors (0402) J17J19 C8C13 6 Murata GRM36X7R102K016A J10 1 2-pin headers (0.1in centers) 33 F 10% tantalum capacitor J11, J16, J22, C14 1 4 Not installed J23 AVX TAJB336K016 Test points 2.2 F 10% tantalum capacitor J20, J21 2 C15 1 Digi-Key 5000K-ND AVX TAJB225K016 J24 1 Not installed 0.82 F ceramic capacitor J9, J10, J12 (0603) (MAX3872EVKIT) 9 Shunts C16 1 J15, J17J19 0.068 F ceramic capacitor MAX3872EGJ, 32-pin QFN (0402) (MAX3874EVKIT) (MAX3872EVKIT) D1 1 Red LED U1 1 MAX3874EGJ, 32-pin QFN D2 1 Not installed (MAX3874EVKIT) R2R5 4 Not installed MAX3872/MAX3874 EV kit R6 1 910 5% resistor (0402) None 1 circuit board, Rev C R7 1 Not installed MAX3872 datasheet 50k variable resistor (MAX3872EVKIT) R8 1 None 1 BOURNS 3296W-203 MAX3874 datasheet R9 1 Not installed (MAX3874EVKIT) 56nH inductors (0805) L1L3 3 Coilcraft CS-560XKBC Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct at 1-888-629-4642, or visit Maxims website at www.maxim-ic.com.MAX3872/MAX3874 Evaluation Kits Jitter analysis and product performance can also be Detailed Description observed by appropriately interfacing the EV kit with a bit-error-rate tester (BERT) and a jitter analyzer. The MAX3872/MAX3874 EV Kit is a fully assembled and factory tested demonstration board that enables OOppereratatiioonnaall M Moodesdes OOppereratatiioonnaall M Moodesdes testing of all MAX3872 and MAX3874 functions. The MAX3872/MAX3874 has three modes of operation: normal, system loopback, and clock TTeesstt Eq Equiuipmpmentent R Reeqquuiirreded TTeesstt Eq Equiuipmpmentent R Reeqquuiirreded holdover. The three operational modes are +3.3V power supply with 200mA current capability programmed by connecting the appropriate pins of Signal-source, 2.7Gbps minimum capability JU13 (SIS) and JU14 (LREF). See Table 1. Normal operation mode requires a serial data stream at the Jitter analyzer capable of 2.7Gbps performance SDI inputs, system loopback mode requires a serial Oscilloscope with at least 3GHz performance data stream at the SLBI inputs, and clock holdover mode requires a reference clock signal at the SLBI TTeesstt Eq Equiuipmpmentent I Inntteerrffaaccee TTeesstt Eq Equiuipmpmentent I Inntteerrffaaccee inputs. The serial inputs (SDI, SLBI) and serial outputs (SDO, SCLKO) have on-board AC-coupling NoNoNoNorrrrmmmmaaaallll and and and and S S S Systystystystemememem LoLoLoLoopopopopbacbacbacback Sk Sk Sk Seeeettttttttiiiinnnnggggssss capacitors to allow direct connection to 50 test Three jumpers (RS1, RS2, RATESET) are available for equipment. The EV kit also has pads on the serial data setting the SDI or SLBI inputs to receive the and clock outputs (SDO, SCLKO) to allow on-board appropriate data rate (Table 2). The FREFSET pin can termination for coupling to high-impedance be set high or low while in normal or system loopback oscilloscopes. mode. QQQQuuuuiiiick Stck Stck Stck Starararartttt ( ( ( (MMMMAAAAXXXX3333878787872222 & & & & MA MA MA MAXXXX3333878787874)4)4)4) CCCClllloooocccckkkk Fr Fr Fr Freqeqeqequuuueeeennnncccciiiieeeessss i i i innnn HolHolHolHoldovdovdovdoverererer M M M Moooodededede This procedure will set up the evaluation board for Set the incoming reference clock frequency and 2.48832Gbps normal operation mode, with input outgoing serial clock frequency by setting RS1, RS2, threshold adjust disabled. RATESET, and FREFSET appropriately. See Table 3. 1) Place a shunt across pins 2 (SIS) and 3 (GND) of AutAutAutAutoooo S S S Swwwwititititchchchch t t t toooo Clock Clock Clock Clock HHHHooooldoldoldoldovvvveeeerrrr MMMModeodeodeode J13. To switch from normal mode to clock holdover mode 2) Place a shunt across pins 1 (VCC) and 2 (LREF) automatically when there are no data transitions of J14. applied to the SDI inputs connect LOL directly to 3) Place a shunt across pins 2 and 3 of J15. LREF by placing a shunt across pins 1 and 2 of J15. 4) Place a shunt across pins 2 (RS1) and 3 (GND) of VVVVeeeerrrrttttiiiiccccaaaallll Thr Thr Thr Threeeesssshhhholololold Ad Ad Ad Addddjjjjuuuussssttttmmmmeeeentntntnt J17. To compensate for optical noise presented on the data 5) Place a shunt across pins 2 (RS2) and 3 (GND) of logic high caused by EDFAs in a WDM transmission J18. system, an external analog control input is provided for 6) Place a shunt across pins 2 (RATESET) and 3 adjusting the data decision threshold to an optimum (GND) of J19. level. 7) Place a shunt across pins 1 (VCC) and 2 (VCTRL) To enable data decision threshold adjustment, place a of J9. shunt across pins 2 and 3 of J9 and shunt pins 1 and 2 8) Remove the shunt from J10. of J10. Set the decision threshold by adjusting the 9) Place a shunt across pins 2 (FREFSET) and 3 potentiometer R8. The center point for the decision (GND) of J12. threshold is 1.2V at the VCTRL pin. 10) Connect a 2.48832Gbps PRBS NRZ signal to the JumpeJumpers, Conrs, Controtrols, Test Pols, Test Pointsints JumpeJumpers, Conrs, Controtrols, Test Pols, Test Pointsints serial data inputs (SDI) with 50 cables. Leave Table 4 summarises the functions of all jumpers, the SLBI inputs unconnected. controls, and test points of the MAX3872/MAX3874 EV 11) Connect the serial data and clock outputs (SDO, Kit. SCLKO) to a 50 high-speed oscilloscope. Terminate any unused outputs with 50 to GND. 12) Connect +3.3V to J20 (VCC) and ground to J21 (GND). 2 Evaluate: MAX3872/MAX3874