MAX9123 19-1927 Rev 0 2/01 Quad LVDS Line Driver with Flow-Through Pinout General Description Features The MAX9123 quad low-voltage differential signaling Flow-Through Pinout (LVDS) differential line driver is ideal for applications Simplifies PC Board Layout requiring high data rates, low power, and low noise. The Reduces Crosstalk MAX9123 is guaranteed to transmit data at speeds up to Pin Compatible with DS90LV047A 800Mbps (400MHz) over controlled impedance media of approximately 100 . The transmission media may be Guaranteed 800Mbps Data Rate printed circuit (PC) board traces, backplanes, or cables. 250ps Maximum Pulse Skew The MAX9123 accepts four LVTTL/LVCMOS input levels and translates them to LVDS output signals. Moreover, Conforms to TIA/EIA-644 LVDS Standard the MAX9123 is capable of setting all four outputs to a Single +3.3V Supply high-impedance state through two enable inputs, EN and EN, thus dropping the device to an ultra-low-power state 16-Pin TSSOP and SO Packages of 16mW (typ) during high impedance. The enables are common to all four transmitters. Outputs conform to the ANSI TIA/EIA-644 LVDS standard. Flow-through pinout Ordering Information simplifies PC board layout and reduces crosstalk by sep- arating the LVTTL/LVCMOS inputs and LVDS outputs. PART TEMP. RANGE PIN-PACKAGE The MAX9123 operates from a single +3.3V supply and is MAX9123EUE -40C to +85C 16 TSSOP specified for operation from -40C to +85C. It is available MAX9123ESE -40C to +85C 16 SO in 16-pin TSSOP and SO packages. Refer to the MAX9121/ MAX9122* data sheet for quad LVDS line receivers with integrated termination and flow-through pinout. Typical Applications Circuit Applications LVDS SIGNALS Digital Copiers DSLAMs MAX9123 MAX9122* Laser Printers Network Switches/Routers Cell Phone Base Stations Backplane T 107 R X X Interconnect Add Drop Muxes Clock Distribution Digital Cross-Connects T 107 R X X Pin Configuration LVTTL/CMOS LVTTL/CMOS DATA INPUT DATA OUTPUT TOP VIEW EN 1 16 OUT1- IN1 2 15 OUT1+ T 107 R X X IN2 3 14 OUT2+ V 4 MAX9123 13 OUT2- CC GND 5 12 OUT3- IN3 6 11 OUT3+ T 107 R X X IN4 7 10 OUT4+ EN 8 9 OUT4- TSSOP/SO 100 SHIELDED TWISTED CABLE OR MICROSTRIP PC BOARD TRACES * Future productcontact factory for availability. Maxim Integrated Products 1 For price, delivery, and to place orders, please contact Maxim Distribution at 1-888-629-4642, or visit Maxims website at www.maxim-ic.com.Quad LVDS Line Driver with Flow-Through Pinout ABSOLUTE MAXIMUM RATINGS V to GND...........................................................-0.3V to +4.0V Storage Temperature Range .............................-65C to +150C CC IN , EN, EN to GND....................................-0.3V to (V + 0.3V) Maximum Junction Temperature .....................................+150C CC OUT +, OUT - to GND..........................................-0.3V to +3.9V Operating Temperature Range ...........................-40C to +85C Short-Circuit Duration (OUT +, OUT -) .....................Continuous Lead Temperature (soldering, 10s) .................................+300C Continuous Power Dissipation (T = +70C) ESD Protection A 16-Pin TSSOP (derate 9.4mW/C above +70C) .........755mW Human Body Model, IN , OUT +, OUT -.......................4kV 16-Pin SO (derate 8.7mW/C above +70C)................696mW Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. DC ELECTRICAL CHARACTERISTICS (V = +3.0V to +3.6V, R = 100 1%, T = -40C to +85C. Typical values are at V = +3.3V, T = +25C, unless otherwise CC L A CC A noted.) (Notes 1, 2) MAX UNITS PARAMETER SYMBOL CONDITIONS MIN TYP LVDS OUTPUT (OUT +, OUT -) Differential Output Voltage V Figure 1 250 368 450 mV OD Change in Magnitude of V OD Between Complementary Output V Figure 1 1 35 mV OD States Offset Voltage V Figure 1 1.125 1.25 1.375 V OS Change in Magnitude of V OS Between Complementary Output V Figure 1 4 25 mV OS States Output High Voltage V 1.6 V OH Output Low Voltage V 0.90 V OL Differential Output Short-Circuit I Enabled, V = 0 -9 mA OSD OD Current (Note 3) OUT + = 0 at IN = V or OUT - = 0 at IN CC Output Short-Circuit Current I -3.8 -9 mA OS = 0, enabled EN = low and EN = high, OUT + = 0 or V , CC Output High-Impedance Current I -10 10 A OZ OUT - = 0 or V , R = CC L V = 0 or open, OUT + = 0 or 3.6V, OUT - CC Power-Off Output Current I -20 20 A OFF = 0 or 3.6V, R = L INPUTS (IN , EN, EN) High-Level Input Voltage V 2.0 V V IH CC Low-Level Input Voltage V GND 0.8 V IL Input Current I IN , EN, EN = 0 or V -20 20 A IN CC SUPPLY CURRENT No-Load Supply Current I R = , IN = V or 0 for all channels 9.2 11 mA CC L CC Loaded Supply Current I R = 100 , IN = V or 0 for all channels 22.7 30 mA CCL L CC D i sabl ed, I N = V or 0 for al l ch annels, C C Disabled Supply Current I 4.9 6 mA CCZ E N = 0, EN = V CC 2 MAX9123