TISP4125H3BJ/TISP4219H3BJ, TISP4125M3BJ/TISP4219M3BJ LCAS RING AND TIP PROTECTION PAIRS BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS TISP4xxxH3/M3BJ Series for LCAS Protection Customized Voltage for LCAS Protection SMBJ Package (Top View) Battery-Backed Ringing ............................................. 87 V rms Ground-Backed Ringing ........................................... 101 V rms V V LCAS DRM (BO) Device 12 R(B) T(A) V V TERMINAL 4125 100 125 TIP MDXXBGE 4219 180 219 RING Low Differential Capacitance ................................. 39 pF max. Device Symbol .................................................... UL Recognized Components T Rated for International Surge Wave Shapes I TSP A Wave Shape Standard H3 M3 SD4XAA SERIES SERIES R 2/10 s GR-1089-CORE 500 300 Terminals T and R correspond to the 8/20 s IEC 61000-4-5 300 220 alternative line designators of A and B 10/160 s FCC Part 68 250 120 10/700 s ITU-T K.20/21/45 200 100 10/560 s FCC Part 68 160 75 10/1000 s GR-1089-CORE 100 50 Description These protector pairs have been formulated to limit the peak voltages on the line terminals of the 7581/2/3 LCAS (Line Card Access Switches) type devices. An LCAS may also be referred to as a Solid State Relay, SSR, i.e. a replacement of the conventional electro-mechanical relay. Overvoltages are normally caused by a.c. power system or lightning flash disturbances which are induced or conducted on to the telephone line. These overvoltages are initially clipped by protector breakdown clamping until the voltage rises to the breakover level, which causes the device to crowbar into a low-voltage on state. This low-voltage on state causes the current resulting from the overvoltage to be safely diverted through the device. For negative surges, the high crowbar holding current helps prevent d.c. latchup with the SLIC current, as the surge current subsides. Each protector consists of a symmetrical voltage-triggered bidirectional thyristor. They are guaranteed to voltage limit and withstand the listed international lightning surges in both polarities. How to Order Device Package Carrier Order As TISP4125H3BJ TISP4125H3BJR-S TISP4219H3BJ TISP4219H3BJR-S BJ (J-Bend DO-214AA/SMB) Embossed Tape Reeled TISP4125M3BJ TISP4125M3BJR-S TISP4219M3BJ TISP4219M3BJR-S *RoHS Directive 2002/95/EC Jan 27 2003 including Annex JUNE 2001 REVISED JANUARY 2007 Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications. *RoHS COMPLIANT TISP4xxxH3/M3BJ Series for LCAS Protection TISP4125H3BJ & TISP4219H3BJ Absolute Maximum Ratings, T = 25 C (Unless Otherwise Noted) A Rating Symbol Value Unit 4125 100 Repetitive peak off-state voltage, (see Note 1) V V DRM 4219 180 Non-repetitive peak on-state pulse current (see Notes 2 and 3) 2/10 s (GR-1089-CORE, 2/10 s voltage wave shape) 500 8/20 s (IEC 61000-4-5, 1.2/50 s voltage, 8/20 current combination wave generator) 300 10/160 s (FCC Part 68, 10/160 s voltage wave shape) 250 5/200 s (VDE 0433, 10/700 s voltage wave shape) 220 I A TSP 0.2/310 s (I3124, 0.5/700 s voltage wave shape) 200 5/310 s (ITU-T K.20/21, 10/700 s voltage wave shape) 200 5/310 s (FTZ R12, 10/700 s voltage wave shape) 200 10/560 s (FCC Part 68, 10/560 s voltage wave shape) 160 10/1000 s (GR-1089-CORE, 10/1000 s voltage wave shape) 100 Non-repetitive peak on-state current (see Notes 2, 3 and 4) 20 ms (50 Hz) full sine wave 55 16.7 ms (60 Hz) full sine wave I 60 A TSM 1000 s 50 Hz/60 Hz a.c. 2.1 Initial rate of rise of on-state current, Exponential current ramp, Maximum ramp value < 200 A di /dt 400 A/s T Junction temperature T -40 to +150 C J Storage temperature range T -65 to +150 C stg NOTES: 1. See Applications Information for voltage values at lower temperatures. 2. Initially, the TISP4xxxH3BJ must be in thermal equilibrium with T =25 C. J 3. The surge may be repeated after the TISP4xxxH3BJ returns to its initial conditions. 4. EIA/JESD51-2 environment and EIA/JESD51-3 PCB with standard footprint dimensions connected with 5 A rated printed wiring track widths. See Figure 10 for the current ratings at other durations. Derate current values at -0.61 %/C for ambient temperatures above 25 C. Recommended Operating Conditions Component Condition Min Typ Max Unit GR-1089-CORE first-level surge survival 0 Series current limiting GR-1089-CORE first-level and second-level surge survival 0 R S resistor K.20, K.21 and K.45 coordination pass with a 400 V primary 6 protector Figure 12, V = -48 V 2.5 V, Battery-backed 87 V rms BAT V AC ringing voltage RING R1= R2 = 300 , 0 C < T < +85 C V rms Ground-backed 101 A JUNE 2001 REVISED JANUARY 2007 Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications.