TISP4A250H3BJ ASYMMETRICAL-BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTOR TISP4A250H3BJ Overvoltage Protector Agency Recognition RING Line Protection for: - LCAS (Line Card Access Switch) such as Le75181, Description Le75183 and Le75282 UL File Number: E215609 Voltages Optimized for: -Battery-Backed Ringing Circuits Maximum Ringing a.c ..............................................104 Vrms SMB Package (Top View) Maximum Battery Voltage ..............................................-52 V V V DRM (BO) Device Name V V (Ground) 12 (Ring) +100 +125 TISP4A250H3BJ -200 -250 Terminal typical application names Rated for International Surge Wave Shapes shown in parenthesis I PPSM MD-SMB-006-a Wave ShapeStandard A Device Symbol 2/10 GR-1089-CORE 500 (Ring) 8/20 IEC 61000-4-5 300 10/160TIA-968-A250 10/700 ITU-T K.20/21/45 200 10/560TIA-968-A160 10/1000 GR-1089-CORE 100 .................................................UL Recognized Component (Ground) Description SD-TISP4A-001-a The TISP4A250H3BJ is an asymmetrical bidirectional overvoltage protector. It is designed to limit the peak voltages on the Ring line terminal of the LCAS (Line Card Access Switch) such as Le75181, Le75183 and Le75282. The TISP4A250H3BJ must be connected with bar-indexed terminal 1 to the protective Ground, and terminal 2 to the Ring conductor. The TISP4A250H3BJ voltages are chosen to give adequate LCAS ring line terminal protection for all switch conditions. The most potentially stressful condition is low level power cross when the LCAS switches are closed. Under this condition, the TISP4A250H3BJ limits the voltage and corresponding LCAS dissipation until the LCAS thermal trip operates and opens the switches. Under open-circuit ringing conditions, the line Ring conductor will have high peak voltages. For battery backed ringing, the Ring conductor will have a larger peak negative voltage than positive, i.e. the peak voltages are asymmetric. The TISP4A250H3BJ has a similar voltage asymmetry and will allow the maximum possible ringing voltage, while giving the most effective pr otection. On a connected line, the Tip conductor will have much smaller voltage levels than the open-circuit Ring conductor values. Here a TISP4xxxH3BJ series symmetrical voltage protector gives adequate protection. Overvoltages are initially clipped by breakdown clamping. If sufficient current is available from the overvoltage, the breakdown voltage will rise to the breakover level, which causes the device to switch into a low-voltage on-state condition. This switching action removes the high voltage stress from the following circuitry and causes the current resulting from the overvoltage to be safely diverted through the protector. The high holding (switch off) current helps prevent d.c. latchup as the diverted current subsides. How to Order DevicePackage Carrier Order As Marking Code Standard Quantity TISP4A250H3BJ SMBEmbossed Tape ReeledTISP4A250H3BJR-S 4A250H 3000 NOVEMBER 2006 REVISED JULY 2019 *RoHS Directive 2015/863, Mar 31, 2015 and Annex. Specifications are subject to change without notice. Users should verify actual device performance in their WARNING Cancer and Reproductive Harm specific applications. The products described herein and this document are subject to specific legal disclaimers as www.P65Warnings.ca.gov set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf.TISP4A250H3BJ Overvoltage Protector Absolute Maximum Ratings, T = 25 C (Unless Otherwise Noted) A Rating Symbol Value Unit +100 Repetitive peak off-state voltage (see Note 1) V V DRM -200 Non-repetitive peak impulse current (see Notes 2 and 3) 2/10 s (GR-1089-CORE, 2/10 s voltage wave shape) 500 8/20 s (IEC 61000-4-5, 1.2/50 s voltage, 8/20 s current combination wave generator) 300 10/160 s (TIA-968-A, 10/160 s voltage wave shape) 250 5/310 s (ITU-T K.44, 10/700 s voltage wave shape used in K.20/21/45) I 200 A PPSM 5/320 s (TIA-968-A, 9/720 s voltage wave shape) 200 10/560 s (TIA-968-A, 10/560 s voltage wave shape) 160 10/1000 s (GR-1089-CORE, 10/1000 s voltage wave shape) 100 Non-repetitive peak on-state current (see Notes 2, 3 and 4) 55 20 ms, 50 Hz (full sine wave) I 60 A 16.7 ms, 60 Hz (full sine wave) TSM 2.2 1000 s, 50 Hz or 60 Hz a.c. Initial rate of rise of on-state currrent, exponential current ramp. Maximum ramp value < 200 Adi /dt 400A/s T Junction temperature T -40 to +150C J Storage temperature range T -65 to +150C stg NOTES:1. See Figure 6 for voltages at other temperatures. 2. Initially the device must be in thermal equilibrium with T = 25 C. J 3. The surge may be repeated after the device returns to its initial conditions. 4. EIA/JESD51-2 environment and EIA/JESD51-3 PCB with standard footprint dimensions connected with 5A rated printed wiring track widths. See Figure 5 for the current ratings at other durations. Derate current values at -0.61 %/C for ambient temperatures above 25 C. Overload Ratings, T = 25 C (Unless Otherwise Noted) A Rating Symbol Value Unit Maximum overload on-state current without open circuit, 50 Hz or 60 Hz a.c. (see note 5) 0.03 s 60 0.07 s 40 I A rms T(OV)M 1.6 s 8 5.0 s 7 1000 s 2.2 NOTE:5.Peak overload on-state current during a.c. power cross tests of GR-1089-CORE and UL 1950/60950. These electrical stress levels may damage the TISP4A250H3BJ silicon die. After test, the pass criterion is either that the device is functional or, if it is faulty, that it has a short-circuit fault mode. In the short-circuit fault mode, the following equipment is protected as the device is a permanent short across the line. The equipment would be unprotected if an open-circuit fault mode developed. NOVEMBER 2006 REVISED JULY 2019 Specifications are subject to change without notice. Users should verify actual device performance in their specific applications. The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf.