Data Sheet BCM5325F Integrated 10/100BASE-T/TX Six-Port Switch GENERAL DESCRIPTION FEATURES The BCM5325F is a six-port 10/100BASE-T/TX Six-port, 10/100 Mbps integrated switch controller fully non-blocking configuration integrated switch targeted at cost-sensitive Fast Ethernet Five integrated 10/100BASE-T/TX/EFX IEEE 802.3u managed switch systems. The device contains five full- compliant transceiversfifth transceiver can be duplex 10BASE-T/100BASE-TX Fast Ethernet connected to external MII interface. transceivers, each of which performs all of the physical Integrated full-duplex capable IEEE 802.3x-compliant layer interface functions for 10BASE-T Ethernet on CAT MACs 3, 4, or 5 unshielded twisted-pair (UTP) cable and 64 KB on-chip packet buffer 100BASE-TX Fast Ethernet on CAT 5 UTP cable. Two configurable MII interfaces 100BASE-EFX is supported through the use of external - MII port connection for TX/FX uplink. fiber optic transceivers. - Reversed MII for CPU. Integrated address managementsupports up to 1K The BCM5325F device provides a very highly integrated unicast addresses solution. It combines all of the functions of a high-speed Port mirroring and Layer-3 IGMP snooping switch system, including packet buffer, transceivers, IEEE 802.1p QoS packet classification with four media access controllers (MACs), address management priority queues and DSCP priorities in IPv4 and IPv6 and a non-blocking switch controller, into a single 16 entries IEEE 802.1q-based and Port-based VLAN monolithic 0.18-m CMOS device. It complies with the Supports IEEE 802.1x EAPOL higher layer protocol IEEE 802.3, 802.3u, and 802.3x specifications, including EEPROM (93C46) allows further un-managed capabilities the MAC control Pause frame and auto-negotiation 25-MHz crystal or oscillator subsections, providing compatibility with all industry- Low-power 3.3/1.8V, 0.18 m CMOS technology standard Ethernet and Fast Ethernet devices. This HP auto-MDIX function hardware selectable function requires only a small low-cost microcontroller to 128-pin MQFP package. initialize and configure the device. Ingress/egress rate control. Protected port capability. MPin compatible with BCM5325. DTE/DPM power over Ethernet detection LEDCLK LEDDATA LEDA (1:5) Bias LED Controller RDAC LEDB (1:5) LEDC (1:5) RD+/- 1:4 10BT/100BTX MAC0-3 Transceiver XTALO TD+/- 1:4 Global XTALI / CK25 Functions RESET RD+/- 5 10BT/100BTX MAC4 Transceiver TD+/- 5 64 KB M Packet Buffer I I MAC5 TXD, TXC, TXEN MII1 L (FDX only) o Address RXD, RXC, RX DV g Management I VLAN c QoS TXD, TXC, TXEN MII2 MIB Counters RXD, RXC, RX DV, CRS, COL Switch SCK Logic w/QoS SS / CS SPI/EEPROM MOSI / DI MISO / DO Figure 1: Functional Block Diagram 5325F-DS14-R 5300 California Avenue Irvine, California 92617 Phone: 949-926-5000 Fax: 949-926-5203 09/16/08BCM5325F Data Sheet 09/16/08 REVISION HISTORY Revision Date Description 5325F-DS14-R 09/16/08 Updated: FEATURES Rate Control Register on page 154. 5325F-DS13-R 04/22/08 Updated: Table 30, Port 4 and MII Ports Configurations Examples, on page 64 Removed Figure 28, Electrical Characteristics, on page 66. Figure 33, VDDBIAS Circuitry, on page 82. 5325F-DS12-R 06/01/07 Added: 100BASE-Enhanced FX on page 23 Vidiff (for full threshold and half threshold) and Vicm to Table 171, Recommended Operating Conditions, on page 177. TDV cm and VO symbols to Table 172, Electrical Characteristics, on page 178. 5325F-DS11-R 03/06/07 Updated: Figure 23, MII Configuration A, on page 64. Figure 24, MII Configuration B, on page 65. Figure 25, MII Configuration C, on page 65. Figure 26, MII Configuration D, on page 66. Figure 27, MII Configuration E, on page 66. Figure 28, MII Configuration F, on page 67. Table 172, Electrical Characteristics, on page 177. Table 173, 128-MQFP Thermal CharacteristicsWithout Heat Sink (2-Layer PCB), on page 178 Added: Table 174, 128-MQFP Thermal CharacteristicsWithout Heat Sink (4-Layer PCB), on page 178. Table 175, 128-MQFP Thermal CharacteristicsWith Heat Sink, on page 178. 5325F-DS10-R 12/22/06 Updated: Table 29, Pseudo PHY MII Register Definitions, on page 63. 5325F-DS09-R 11/02/06 Updated: Table 41 on page 88. Added: LED Flash Control Register on page 95. LEDa Control Register on page 95. LEDb Control Register on page 96. LEDc Control Register on page 96. 5325F-DS08-R 07/18/06 Updated: TXD 0 should be pulled down during power-up (MII1 TXD 0 on page 81). TXD 1 should be pulled down during power-up (MII1 TXD 1 on page 81). DNC on page 83)Ingress Mirror Divider Register on page 106. Egress Mirror Divider Register on page 108. Broadcom Corporation Page ii Document 5325F-DS14-R