DA9061 PMIC for Applications Requiring up to 6 A General Description DA9061 is a power management integrated circuit (PMIC) optimized for supplying systems with single- and dual-core processors, I/O, DDR memory, and peripherals. It targets mobile device, medical equipment, IVI systems, and FPGA based applications. DA9061 features three buck converters providing a total current of 6 A. High efficiency is achieved over a wide load range by using automatic pulse frequency modulation (PFM) mode. All power switches are integrated, therefore, external Schottky diodes are not required. Furthermore, low- profile inductors can be used with DA9061. The four LDO regulators with programmable output voltage provide up to 300 mA. Dynamic voltage control (DVC) allows dynamic control of DA9061 supply voltages according to the 2 operating point of the system. It is controlled by writing directly to the registers using the I C compatible 2-wire interface or the GPIOs. DA9061 features a programmable power sequencer that handles start-up and shutdown sequences. Power mode transitions can be triggered with software control, GPIOs, or with the on-key. Several types of on-key presses can be detected to trigger different power mode transitions. An integrated watchdog timer monitors the system. Five GPIOs are able to perform system functions, including: keypad supervision, application buck, and timing-controlled external regulators/power switches or other ICs. DA9061 is also available as an automotive AEC-Q100 Grade 3 version. Key Features Input voltage 2.7 V to 5.5 V Programmable power mode sequencer Three buck converters with dynamic voltage System supply and junction temperature control: monitoring Buck1: 0.3 V to 1.57 V, 2.5 A Watchdog timer Buck2: 0.8 V to 3.34 V, 2 A Five GPIOs Buck3: 0.53 V to 1.8 V, 1.5 A -40 C to +125 C junction temperature range 3 MHz switching frequency (enables low 40-pin QFN, 6 mm 6 mm package, 0.5 mm profile inductors) pitch Four LDO regulators: Automotive AEC-Q100 Grade 3 version available LDO1: 0.9 V to 3.6 V, 100 mA LDO2, LDO3, LDO4: 0.9 V to 3.6 V, 300 mA Applications Single and dual core application processors Automotive infotainment such as ARM Cortex or i.MX6 series Portable industrial and medical devices Entry-level FPGAs e-book readers Datasheet Revision 3.6 31-Jan-2019 CFR0011-120-00 1 of 86 2019 Dialog Semiconductor DA9061 PMIC for Applications Requiring up to 6 A Block Diagram C VDDCORE VDDIO VDDCORE VSYS VDD BUCK1 LDO1 BUCK1 C L LDO1 BUCK1 VDD LDO2 C BUCK1 LDO2 C LDO2 VDD BUCK2 BUCK2 VDD LDO34 L BUCK2 LDO3 C C LDO3 BUCK2 LDO4 C LDO4 DA9061 VDD BUCK3 BUCK3 L BUCK3 GPIO0 GPIO1 C BUCK3 GPIO2 GPIO GPIO3 GPIO4 Control nONKEY Power And nRESETREQ WD Sequencer Status nRESET Registers Interrupt 2-Wire nIRQ Control Interface VREF C IREF VREF R IREF SCL SDA TP Figure 1: DA9061 Block Diagram Datasheet Revision 3.6 31-Jan-2019 CFR0011-120-00 2 of 86 2019 Dialog Semiconductor