Atlys Board Atlys Board Reference Manual Reference Manual Revision: August 5, 2013 1300 Henley Court Pullman, WA 99163 Note: This document applies to REV C of the board. (509) 334 6306 Voice and Fax Overview The Atlys circuit board is a complete, ready-to-use digital circuit development platform based on a Xilinx Spartan-6 LX45 FPGA, speed grade -3. The large FPGA and on-board collection of high-end peripherals including Gbit Ethernet, HDMI Video, 128MByte 16-bit DDR2 memory, and USB and audio ports make the Atlys board an ideal host for a wide range of digital systems, including embedded processor designs based on Xilinxs MicroBlaze. Atlys is compatible with all Xilinx CAD tools, including ChipScope, EDK, and the free ISE WebPack, so designs can be completed at no extra cost. The Spartan-6 LX45 is optimized for high- performance logic and offers: 6,822 slices, each containing four 6- 6 23 input LUTs and eight flip-flops Adept USB2 SPI Flash (x4) Config & data 16Mbyte 2.1Mbits of fast block RAM four clock tiles (eight DCMs & four 45 4 DDR2 USB HID Host PLLs) 128MByte Mouse/Keyboard six phase-locked loops Spartan-6 58 DSP slices 29 10/100/1000 2 USB-UART 500MHz+ clock speeds Ethernet PHY XC6SLX45 The Atlys board includes Digilent s newest 10 CSG324C HDMI IN Clock 100MHz Adept USB2 system, which offers device 10 programming, real-time power supply HDMI IN monitoring, automated board tests, virtual 22 Basic I/O I/O, and simplified user-data transfer LEDs, Btns, Swts 10 facilities. HDMI OUT 10 40 High-Speed HDMI OUT A comprehensive collection of board Expansion support IP and reference designs, and a large collection of add-on boards are 8 AC-97 Audio Pmod Port 5 Codec Expansion available on the Digilent website. See the Atlys page at www.digilentinc.com for more information. Doc: 502-178 page 1 of 22 Copyright Digilent, Inc. All rights reserved. Other product and company names mentioned may be trademarks of their respective owners. Atlys Reference Manual Features Xilinx Spartan-6 LX45 FPGA, 324-pin BGA package 128Mbyte DDR2 with 16-bit wide data 10/100/1000 Ethernet PHY on-board USB2 ports for programming and data transfer USB-UART and USB-HID port (for mouse/keyboard) two HDMI video input ports and two HDMI output ports AC-97 Codec with line-in, line-out, mic, and headphone real-time power monitors on all power rails 16Mbyte x4 SPI Flash for configuration and data storage 100MHz CMOS oscillator 48 I/Os routed to expansion connectors GPIO includes eight LEDs, six buttons, and eight slide switches ships with a 20W power supply and USB cable Configuration After power-on, the Adept USB Port Numonyx SPI FPGA on the Atlys SPI USB Flash (x4) board must be Port Controller 16Mbytes configured (or J17 JTAG programmed) before it Port can perform any 2x7 2mm M0 JP11 functions. The FPGA Prog. Header Load to disable M1 can be configured in boot from ROM three ways: a USB- Spartan-6 connected PC can JP10 J10 configure the board Load to disable I/O HSWEN using the JTAG port any pull-ups during config Host Port time power is on, a 2 Serial configuration file stored PIC24 Done Port in the SPI Flash ROM J13 can be automatically transferred to the FPGA at power-on, or a programming file can be transferred from a USB memory stick attached to the USB HID port. An on-board mode jumper (JP11) selects between JTAG/USB and ROM programming modes. If JP11 is not loaded, the FPGA will automatically configure itself from the ROM. If JP11 is loaded, the FPGA will remain idle after power-on until configured from the JTAG or Serial programming port. Always keep JP12 loaded (either on 3.3V or 2.5V). If JP12 is not loaded, bank 2 of the FPGA is not supplied, and neither are the pull-ups for CCLK, DONE, PROGRAM B and INIT B. The FPGA is held in the Reset state, so it is not seen in the JTAG chain, neither can be programmed from the serial FLASH. www.digilentinc.com page 2 of 22 Copyright Digilent, Inc. All rights reserved. Other product and company names mentioned may be trademarks of their respective owners.