S1D13L02 S1D13L02 VGA Graphics Controller The S1D13L02 is a low cost, low power, multi-purpose Graphics LCD Controller with 1024KByte embedded SRAM display buffer. The S1D13L02 includes a pixel doubling feature which allows easy migration to larger panel sizes using existing image data such as QVGA to VGA. The feature set includes independent resizing of PIP window image data using the bi-cubic scaler and LCD output manipulation such as gamma control and optional dithering. The S1D13L02 feature set and architecture are designed to meet the requirements of embedded systems such as Factory Automation, Medical Equipments and Office Automation applications. FEATURES Support for up to 3 display layers with overlay and alpha Embedded 1024K byte SRAM blending Low Operating Voltage 16-bit Indirect Host Interface Main Layer image can be doubled in size High Speed Host Writes PIP1 Layer can be resized from 8x to 1/8x Rectangular, Rotated, and Mirror Host Write PIP2 Layer can be resized from 8x to 1/8x Modes Look-up Table for gamma control of LCD output Input Formats: RGB 5:6:5 Optional dithering of LCD output Support for RGB Parallel I/F TFT panels Internal PLL or Digital Clock Input Software Initiated Power Save Mode QFP22-208pin package SYSTEM BLOCK DIAGRAM TFT(RGB digital) Control Signals HOST S1D13L02 CPU S1D13L02 Features 1024kB SRAM Up to 3 Display Layers Overlay and Alpha Blending Gamma Control of LCD output S1D13L02 DESCRIPTION Memory Display Features 1024K bytes of embedded SRAM Supports up to 3 layers with Overlay and Alpha Blending functions: CPU Interface Main Layer features: 16-bit Indirect Host Interface Image can be stored as RGB 5:6:5 Supports High Speed Host Writes Pixel Doubling which doubles the size of the display Integrated Host interface Write Controller supports: image (independent horizontal/vertical) Rectangular Write Mode PIP1 Layer features: Rotated Write Mode Image can be stored as RGB 5:6:5 Mirror Write Mode Bi-Cubic Scaler can resize image from 8x - 1/8x Edge Enhancement support Panel Support PIP2 Layer features: 9/12/16/18/24-bit RGB interface panels Image can be stored as RGB 5:6:5 Input Formats Bi-Cubic Scaler can resize image from 8x - 1/8x Edge Enhancement support Host can input image data as: LUT (Look-Up Table) for independent gamma RGB 5:6:5 control of PIP2 window LUT (Look-Up Table) for gamma control of the LCD output Optional dithering for the LCD output Miscellaneous Internal PLL or digital clock input (CLKI) Software initiated power save mode General Purpose IO pins CORE 1.5 volts and IO 1.80, 2.80, or 3.30 volts VDD VDD Packages: QFP22 208-pin (28 x 28 x 1.4mm) (0.5mm pitch) NOTICE: No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice. Seiko Epson does not assume any liability of any kind arising out of any inaccuracies contained in this material or due to its application or use in any product or circuit and, further, there is no representation that this material is applicable to products requiring high level reliability, such as, medical products. Moreover, no license to any intellectual property rights is granted by implication or otherwise, and there is no representation or warranty that anything made in accordance with this material will be free from any patent or copyright infringement of a third party. When exporting the products or technology described in this material, you should comply with the applicable export control laws and regulations and follow the procedures required by such laws and regulations. You are requested not to use, to resell, to export and/or to otherwise dispose of the products (and any technical information furnished, if any) for the development and/or manufacture of weapon of mass destruction or for other military purposes. All brands or product names mentioned herein are trademarks and/or registered trademarks of their respective companies. EPSON semiconductor website