Product Flyer Mixed Signal Division January 2008 DK86064-2 Version 2.1 FME/MS/DAC80/FL 2/5084 Dual 14-bit 1GSa/s DAC Development Kit Features Description Development kit for MB86064 The DK86064-2 development kit provides a MB86064 Evaluation Board simple and effective means of evaluating the PC USB Programming Cable MB86064 dual 14-bit 1GSa/s Digital to Analog PC control software supplied on CD Converter (DAC). - Win2000/XP compatible User Manual A user manual provides a step-by-step guide from configuring the board and connecting test SMA data adaptors (optional) equipment, through to evaluating the MB86064 performance. Schematics, PCB overlays and Provides easy access to on-chip waveform connector pin-outs are included. The evaluation memories to perform initial performance tests, platform requires two DC power supplies, 1.8V & avoiding need for high performance data 3.3V, each capable of providing 1 amp. generating equipment The PC USB programming cable and control software is included to configure and control the device, as well as download test vectors to the waveform memory module. DK86064-2 Evaluation Platform Copyright 2004-2008 Fujitsu Microelectronics Europe GmbH Production Page 1 of 4 Disclaimer: The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering.The information and circuit diagrams in this document are presented as is, no license is granted by implication or otherwise. January 2008 Version 2.1 FME/MS/DAC80/FL 2/5084 DK86064-2 Dual 14-bit 1GSa/s DAC Development Kit programming cable supplied. Even if high speed Essential Equipment digital pattern generating equipment is available, Apart from the power supplies, the minimum initial testing using the waveform memories equipment vital to conducting an evaluation of serves as a useful setup check. the MB86064 is a high quality RF clock and spectrum analyser. The phase & spurious Pattern generators performance of the clock should be such as to can be connected to not limit the DAC performance (e.g. HP8664A). the evaluation board However, performance of even the best using either the on- spectrum analysers available is inferior to that of board 2-row 0.1 data the converter. To overcome this, filtering headers, or via ribbon techniques and careful attention to analyser cables to the optional settings, e.g. RF Attenuation, is essential during SMA adaptors. When the course of the evaluation. using the 0.1 data headers it is assumed that a custom wiring harness will be required. This would be made according to the connector type and pinout of the generators output. The optional SMA adaptors provide a convenient conversion from SMA to the evaluation boards 0.1 headers. This alleviates the simultaneous removal of 28 SMAs (14-bit differential LVDS) when required to be disconnected. One advantage of this is the ability to easily swap the data generator between DAC data ports if insufficient channels are available to drive both ports simultaneously. Rather than using general purpose test Driving the DAC equipment, customers may wish to use the evaluation board to construct a platform more As with any DAC evaluation an appropriate test representative of their end application. This vector stimulus is required. Unfortunately at data might, for example, involve an FPGA to rates above 300MSa/s this requires digital implement a variety of pre-processing and/or pattern generation capabilities beyond most waveform generation functions. At the simplest standard test equipment. The DK86064-2 level, a setup similar to that described for the Development Kit has been designed to help digital pattern generator could be used, where a overcome this difficulty in a number of ways. custom wiring harness interfaces a standard or Initially, unmodulated or pseudo-modulated existing FPGA platform to the DAC evaluation single and multi-tone/carrier tests can be board. Control of the DAC from the PC software conducted using waveforms downloaded to the can be maintained to minimise effort to get up on-chip memories. and running. Test waveforms are easily loaded into the memories using the PC software and USB Page 2 of 4 Production Copyright 2004-2008 Fujitsu Microelectronics Europe GmbH Disclaimer: The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering.The information and circuit diagrams in this document are presented as is, no license is granted by implication or otherwise.