GS4915INE3

GS4915 ClockCleaner GS4915 Data Sheet Key Features Description Reduces jitter for clocks of 148.5MHz, The GS4915 provides a low jitter clock output when fed 148.5/1.001MHz, 74.25MHz, 74.25/1.001MHz and with an HD or SD video clock input. Other input clock 27MHz frequencies between 12MHz and 165MHz can be automatically passed through to the GS4915 outputs. Output jitter as low as 20ps peak to peak Automatic bypass mode for all other clock rates An internal 2:1 mux allows the user to select between a differential or single-ended (LVCMOS) input clock. Both Loop bandwidth adjustable as low as 2kHz a single-ended LVCMOS- compatible and an Output skew control LVDS-compatible differential output are provided. Input selectable as differential or single-ended The GS4915 may operate in either auto or fixed Both single-ended and differential outputs frequency mode. In auto mode, the device will Uses the GO1555 VCO automatically clean the selected input clock if its Small 6mm x 6mm 40-pin QFN package frequency is found to be one of the supported SD or HD clock rates. In fixed mode, the user selects only one of Pb-free and RoHS compliant these frequencies to be cleaned. Applications In addition, the device allows the user to select between High definition video systems. Digital video recording, auto or manual bypass operation. In autobypass mode, playback, processing and display devices. the GS4915 will automatically bypass its cleaning stage and pass the input clock signal directly to the output whenever the device is unlocked, which includes the case where the input frequency is something other than the five frequencies supported. In manual bypass mode, the input signal passes through directly to the output. The GS4915 can optionally double the output frequency for 74.25MHz or 74.175MHz HD clocks in order to provide optimal jitter performance of some serializers. The GS4915 also provides the user with a 2-state skew control. The output clocks produced by the device may be advanced by of an output CLK period in order to accommodate downstream setup and hold requirements. The GS4915 is designed to operate with the GO1555 VCO. The GS4915 Clock Cleaner complements Gennum s GS4911B Clock and Timing Generator for implementing a video genlock solution. Whereas the GS4911B itself cleans low-frequency jitter, the GS4915 is designed to clean primarily the higher frequency jitter of clocks generated by the GS4911B. 39145 - 4 February 2008 1 of 26 www.gennum.comGS4915 Data Sheet Functional Block Diagram VCO 2.5V Regulator Receiver CLKIN DIFF I/P CLKIN Buffer 0 Phase Charge Divide 1 Detector Pump by N S-E I/P CLKIN SE Buffer Clock Cleaning PLL DIFF O/P CLKOUT Buffer CLKOUT Skew clkout 0 Select IPSEL clkin 1 S-E O/P CLKOUT SE Buffer bypass Frequency Digital Control Block Detection GS4915 Functional Block Diagram 39145 - 4 February 2008 2 of 26 LOCK REG VDD VCO VDD RESET SKEW EN CP VDD LF BYPASS CP RES AUTOBYPASS VCO VCO FCTRL 1:0 DOUBLE